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    CY7C388A Search Results

    CY7C388A Datasheets (17)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C388A-0AC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-0AI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-0BGC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-0GC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-0GI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-0GMB Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-1AC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-1AI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-1BGC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-1GC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-1GI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-2AC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-2AI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-2BGC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-2GC Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-2GI Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF
    CY7C388A-IGMB Cypress Semiconductor Very High Speed 8K (24K) Gate CMOS FPGA Scan PDF

    CY7C388A Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    application of programmable array logic

    Abstract: 4000 CMOS CMOS 4000 digital clock using logic gates FLASH370 pASIC380
    Text: PRESS RELEASE CYPRESS EXPANDS FPGA OFFERING WITH 8,000-GATE DEVICES Highest Performance FPGAs Offer Full PCI Compliance For All Speed Grades SAN JOSE, Calif., February 27, 1995 - Cypress Semiconductor Corporation today introduced 8000-gate versions of its speed-leading pASIC380 family of fieldprogrammable gate arrays. The new CY7C387A and CY7C388A FPGAs are fully


    Original     		000-GATE 8000-gate pASIC380TM CY7C387A CY7C388A FLASH370, application of programmable array logic 4000 CMOS CMOS 4000 digital clock using logic gates FLASH370 pASIC380 PDF

    ql16x24bl

    Abstract: CF100 PF100 PF144 PL84 QL12X16B ABEL-HDL Reference Manual
    Text: pASIC Device Kit Manual pASIC Device Kit Manual 981-0333-002 May 1995 090-0560-002 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or


    Original     		PDF

    CY62256LL-PC

    Abstract: VIC068A-GC VIC64-NC VIC64-UMB PALCE22V10-JI PALC16L8Q PLD VME A113 CY7B923 JESD22-A113
    Text: Cypress Semiconductor Product Reliability 1997 Published June, 1997 CYPRESS SEMICONDUCTOR PRODUCT RELIABILITY TABLE OF CONTENTS 1.0 OVERVIEW OF CYPRESS SEMICONDUCTOR TOTAL QUALITY MANAGEMENT SYSTEM. 1 2.0 ELECTRICAL AVERAGE OUTGOING QUALITY. 2


    Original     		PALCE22V10-JC FLASH-FL22D CY62256LL-PC VIC068A-GC VIC64-NC VIC64-UMB PALCE22V10-JI PALC16L8Q PLD VME A113 CY7B923 JESD22-A113 PDF

    10BASET4

    Abstract: transformer ethernet mux symbol of transformer CY7C971 Led driver 100W schematic RJ45 modular jack 100BASE 10BASE power supply driver led 100w schematic
    Text: 100BASE ĆT4 Ethernet Repeater Background This application note describes the design of a 100BASEĆT4 Ethernet Network Repeater using the Cypress CY7C971 PHY and CY7C388P for the core logic. The repeater has the following features: D 100ĆMb/s Shared Bandwidth over Cat. 3 UTP


    Original     		100BASE 100BASET4 CY7C971 CY7C388P 100Mb/s 100BASET4 100BASET4, 10BASET4 transformer ethernet mux symbol of transformer Led driver 100W schematic RJ45 modular jack 10BASE power supply driver led 100w schematic PDF

    CY7C386A-1AC

    Abstract: CY7C386A-0AC 7C385A CY7C385A-2AC
    Text: CY7C385A CY7C386A Very High Speed 4K 12K Gate CMOS FPGA Features D Very high speed D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies up to 110 MHz Ċ Input + logic cell + output delays under 6 ns Unparalleled FPGA performance for


    Original     		CY7C385A CY7C386A 84pin 100pin 144pin 160pin 16bit CY7C386A-1AC CY7C386A-0AC 7C385A CY7C385A-2AC PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C387A CY7C388A ¿r C Y P R E S S Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iql of 12 mA and Iqh of 8 mA • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies


    OCR Scan     		CY7C387A CY7C388A 145-pin 144-pin 208-pin 160-pin 16-bit PDF

    FPGA 144 CPGA 172 PLCC ASIC

    Abstract: A144 CY7C386A CY7C387A CY7C387A-2GC CY7C388A CY7C387A2AI
    Text: CY7C387A CY7C388A PRELIMINARY CYPRESS Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum I o l of 12 mA and Ioh °f • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies


    OCR Scan     		CY7C387A CY7C388A 145-pin 245-pin 144-pin 208-pin 160-pin 225-pin 16-bit FPGA 144 CPGA 172 PLCC ASIC A144 CY7C386A CY7C387A-2GC CY7C388A CY7C387A2AI PDF

    P/N146071

    Abstract: No abstract text available
    Text: /u o o /d /o d . 1»»*+ lu w ò u d y , iv id y Revision: Friday, June 24,1994 3f CYPRESS PRELIMINARY Very High Speed 8K 24K Gate CMOS FPGA — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iol of 12 mA and Ioh of 8mA • Flexible logic cell architecture


    OCR Scan     		16-bit P/N146071 PDF

    programmer manual EPLD cypress

    Abstract: No abstract text available
    Text: l l lt fM d l l l t? . I U t? 5 U d y , M U y U 5 > l I I , ItKfcS Revision: Tuesday, June 28,1994 pASIC380 Family F/ CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz


    OCR Scan     		pASIC380 16-bit 0014L22 programmer manual EPLD cypress PDF