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    CY7C1378 Search Results

    CY7C1378 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CY7C1378B Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1378B-166AC Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1378C Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1378C-166AXC Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1378C-166AXI Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1378C-200AXC Cypress Semiconductor 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture Original PDF

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    Untitled

    Abstract: No abstract text available
    Text: CY7C1378B 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378B 200-MHz 166-MHz 100-pin CY7C1378B

    Untitled

    Abstract: No abstract text available
    Text: CY7C1378C PRELIMINARY 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1378C 250-MHz 200-MHz 166-MHz 100-pin

    Untitled

    Abstract: No abstract text available
    Text: CY7C1378C PRELIMINARY 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1378C 250-MHz 200-MHz 166-MHz 100-pin

    CY7C1378C

    Abstract: CY7C1378C-166AXC CY7C1378C-166AXI CY7C1378C-200AXC
    Text: CY7C1378C 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378C 250-MHz 100-Pin CY7C1378C CY7C1378C-166AXC CY7C1378C-166AXI CY7C1378C-200AXC

    A101

    Abstract: CY7C1378C CY7C1378C-166AXC
    Text: CY7C1378C PRELIMINARY 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1378C 200-MHz 167-MHz 100-pin CY7C1378C A101 CY7C1378C-166AXC

    CY7C1378C

    Abstract: CY7C1378C-166AXC CY7C1378C-166AXI CY7C1378C-200AXC
    Text: CY7C1378C 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378C 250-MHz 100-Pin CY7C1378C CY7C1378C-166AXC CY7C1378C-166AXI CY7C1378C-200AXC

    Untitled

    Abstract: No abstract text available
    Text: CY7C1378B 9-Mb 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378B 200-MHz 166-MHz 100-pin CY7C1378B

    86 cen

    Abstract: No abstract text available
    Text: CY7C1378C PRELIMINARY 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1378C 250-MHz 200-MHz 166-MHz 100-pin 86 cen

    Untitled

    Abstract: No abstract text available
    Text: CY7C1378C 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378C 250-MHz 200-MHz 166-MHz 100-pin CY7C1378C

    A101

    Abstract: CY7C1378B CY7C1378B-166AC
    Text: CY7C1378B 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1378B 200-MHz 166-MHz 100-pin CY7C1378B A101 CY7C1378B-166AC

    Untitled

    Abstract: No abstract text available
    Text: CY7C1378C PRELIMINARY 9-Mbit 256K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin-compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1378C 250-MHz 200-MHz 166-MHz 100-pin

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original     		PDF CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC

    pinout processor pentium 2

    Abstract: military processors
    Text: CY7C1378 CY7C1379 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR • Supports 50-MHz Pentium proces­ sor cache systems with zero wait states • 32K by 18 common I/O • Fast clock-to-output times — 12.S ns with 0-pF load — 14 ns with 85-pF load • TWo-bit wraparound counter support­


    OCR Scan     		PDF CY7C1378 CY7C1379 50-MHz 85-pF 7C1378) 7C1379) 52-pin i486on pinout processor pentium 2 military processors