CY62137V
Abstract: CY62137V18 CY62137VLL-55ZI CY62137VLL-70ZI
Text: 1*CY62137V18 MoBL2 CY62137V MoBL™ 128K x 16 Static RAM Features high-impedance state when: deselected CE HIGH , outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). • Low voltage range:
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CY62137V18
CY62137V
CY62137V:
CY62137V18
CY62137VLL-55ZI
CY62137VLL-70ZI
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Untitled
Abstract: No abstract text available
Text: CY62137V MoBL CY62137V18 MoBL2™ 128K x 16 Static RAM Features are placed in a high-impedance state when: deselected CE HIGH , outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).
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CY62137V
CY62137V18
CY62137V18:
CY62137V:
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CY62137V
Abstract: CY62137V18
Text: CY62137V MoBL CY62137V18 MoBL2™ 128K x 16 Static RAM Features are placed in a high-impedance state when: deselected CE HIGH , outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).
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CY62137V
CY62137V18
CY62137V18:
CY62137V:
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CY62135V18
Abstract: CY7C1329 8355F
Text: Cypress Semiconductor Product Qualification Report QTP# 003108 VERSION 1.0 December 2000 2 Meg FCP MoBL2 SRAM Family R52D-3, Fab 4 CY62135V18 CY62136V18/CY62137V18 128K x 16 Static RAM MoBL and More Battery life are Trade mark of Cypress Semiconductor Corporation.
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R52D-3,
CY62135V18
CY62136V18/CY62137V18
CY62136V18/CY62136V18/CY62137V18
R52D-3
CY7C1329-AC
30C/60
CY62135V18
CY7C1329
8355F
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Untitled
Abstract: No abstract text available
Text: CY62137CV18 MoBL2 128K x 16 Static RAM Features deselected CE HIGH or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are
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CY62137CV18
CY62137CV18:
CY62137V18/BV18
I/O15)
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2M X 32 Bits 72-Pin Flash SO-DIMM
Abstract: AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037
Text: GO TO WEB MAIN INDEX 3URGXFW 6HOHFWRU *XLGH Static RAMs Organization/Density Overview Density X1 X4 X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 4 Kb 16 Kb 7C167A 7C168A 7C128A 6116 64 Kb to 72 Kb 7C187 7C164 7C166 7C185 6264 7C182 256 Kb to 288 Kb 7C197 7C194
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7C148
7C149
7C150
7C167A
7C168A
7C128A
7C187
7C164
7C166
7C185
2M X 32 Bits 72-Pin Flash SO-DIMM
AN2131QC
Triton P54C
SO-DIMM 72pin 32bit 5V 2M
AN2131-DK001
AN2131SC
vhdl code for pipelined matrix multiplication
VIC068A user guide
parallel interface ts vhdl
7C037
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CY62137CV18
Abstract: No abstract text available
Text: CY62137CV18 MoBL2 128K x 16 Static RAM Features power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance
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CY62137CV18
I/O15)
CY62137CV18:
CY62137V18/BV18
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A15C
Abstract: CY62137V CY62137V18 CY62137VLL-70BAI CY62137VLL-70ZI CY62137
Text: CY62137V MoBL CY62137V18 MoBL2™ CYPRESS 1 2 8 K x 1 6 S ta tic R A M Features are placed in a h igh -im pe da nce state w h en : de selected CE HIG H , ou tputs are disabled (OE HIG H), BHE and BLE are disabled (B H E , BLE HIG H), o r during a w rite op era tion (CE
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CY62137V18
CY62137V:
CY62137V
A15C
CY62137VLL-70BAI
CY62137VLL-70ZI
CY62137
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