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    CY37064 Price and Stock

    Infineon Technologies AG CY37064P100-125AC

    IC CPLD 64MC 10NS 100TQFP
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    DigiKey CY37064P100-125AC Bag 450
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    Infineon Technologies AG CY37064P44-125JXC

    IC CPLD 64MC 10NS 44PLCC
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    DigiKey CY37064P44-125JXC Tube 130
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    Infineon Technologies AG CY37064P44-125AXI

    IC CPLD 64MC 10NS 44TQFP
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    DigiKey CY37064P44-125AXI Tray
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    Infineon Technologies AG CY37064P84-125JXC

    IC CPLD 64MC 10NS 84PLCC
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    DigiKey CY37064P84-125JXC Tube
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    Rochester Electronics LLC CY37064P44-200JXC

    IC CPLD 64MC 6NS 44PLCC
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    DigiKey CY37064P44-200JXC Bulk 32
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    Find more CY37064 price and stock on Findchips.com

    CY37064 Datasheets (140)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CY37064 Cypress Semiconductor UltraLogic 64-Macrocell ISR CPLD Original PDF
    CY37064 Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P100-125AC Cypress Semiconductor 5V, ISR High-Performance CPLD Original PDF
    CY37064P100-125AC Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P100-125AC Cypress Semiconductor UltraLogic 64-Macrocell ISR CPLD Original PDF
    CY37064P100-125AC Cypress Semiconductor 5V, 3.3V, ISRTM High-Performance CPLDs Original PDF
    CY37064P100-125AI Cypress Semiconductor 5V, ISR High-Performance CPLD Original PDF
    CY37064P100-125AI Cypress Semiconductor UltraLogic 64-Macrocell ISR CPLD Original PDF
    CY37064P100-125AI Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P100-125AXC Cypress Semiconductor 5V, 3.3V, ISRTM High-Performance CPLDs Original PDF
    CY37064P100-125AXI Cypress Semiconductor 5V, 3.3V, ISRTM High-Performance CPLDs Original PDF
    CY37064P100-125AXIT Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 Original PDF
    CY37064P100-154AC Cypress Semiconductor 5V, ISR High-Performance CPLD Original PDF
    CY37064P100-154AC Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P100-154AI Cypress Semiconductor 5V, ISR High-Performance CPLD Original PDF
    CY37064P100-154AI Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37064P100-167AC Cypress Semiconductor UltraLogic 64-Macrocell ISR CPLD Original PDF
    CY37064P100-167AI Cypress Semiconductor UltraLogic 64-Macrocell ISR CPLD Original PDF
    CY37064P100-200AC Cypress Semiconductor 5V, ISR High-Performance CPLD Original PDF
    ...

    CY37064 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY37064

    Abstract: CY37064P44-167AC CY37032 CY37064V CY37064-200 CY37064P44-125AC
    Text: 6 PRELIMINARY CY37064 UltraLogic 64-Macrocell ISR™ CPLD — tS = 3.5 ns Features • 64 macrocells in four logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • • • • — Design changes don’t cause pinout changes


    Original     		PDF CY37064 64-Macrocell CY37064 CY37064P44-167AC CY37032 CY37064V CY37064-200 CY37064P44-125AC

    Untitled

    Abstract: No abstract text available
    Text: CY37064V PRELIMINARY UltraLogic 3.3V 64-Macrocell ISR™ CPLD Features — tPD = 8.5 ns — tS = 5.0 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — tCO = 6.0 ns Product-term clocking


    Original     		PDF CY37064V 64-Macrocell

    CY37064

    Abstract: CY37064V ultraISR CABLE
    Text: Back PRELIMINARY CY37064V UltraLogicTM 3.3V 64-Macrocell ISRTM CLPD Features — tPD = 10 ns — tS = 5.5 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — tCO = 6.5 ns Product-term clocking


    Original     		PDF CY37064V 64-Macrocell CY37064, CY37032/37032V, CY37128/37128V CY37064 CY37064V ultraISR CABLE

    CY37064P44-154YMB

    Abstract: CY37064P44-154JI cy37064p44 44 Lead Ceramic Leadless Chip Carrier CY37064
    Text: PRELIMINARY CY37064 UltraLogic 64-Macrocell ISR™ CPLD Features • • • • • • • • • • 64 macrocells in four logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


    Original     		PDF CY37064 64-Macrocell 44-Lead CY37064P44-154YMB CY37064P44-154JI cy37064p44 44 Lead Ceramic Leadless Chip Carrier CY37064

    cy37128 bsdl file

    Abstract: CYP37256 bsdl cy37512 AN1024 0X00 CY37032 CY37064 CY37128 CY37192 CY37
    Text: Using IEEE 1149.1 Boundary Scan JTAG With Cypress Ultra37000 CPLDs AN1024 Associated Project: No Associated Part Family: CY37512, CY37384, CY37256, CY37192, CY37128, CY37064, CY37032 GET FREE SAMPLES HERE Associated Application Notes: None Application Note Abstract


    Original     		PDF Ultra37000TM AN1024 CY37512, CY37384, CY37256, CY37192, CY37128, CY37064, CY37032 cy37128 bsdl file CYP37256 bsdl cy37512 AN1024 0X00 CY37032 CY37064 CY37128 CY37192 CY37

    CY37064

    Abstract: CY37064V ultraISR CABLE
    Text: PRELIMINARY CY37064V UltraLogicTM 3.3V 64-Macrocell ISRTM CLPD Features — tPD = 10 ns — tS = 5.5 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — tCO = 6.5 ns Product-term clocking


    Original     		PDF CY37064V 64-Macrocell CY37064, CY37032/37032V, CY37128/37128V CY37064 CY37064V ultraISR CABLE

    CY37064

    Abstract: CY37032 CY37064V Chip Tools
    Text: 6 Back PRELIMINARY CY37064 UltraLogic 64-Macrocell ISR™ CPLD — tS = 3.5 ns Features • 64 macrocells in four logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • • • • — Design changes don’t cause pinout changes


    Original     		PDF CY37064 64-Macrocell CY37064 CY37032 CY37064V Chip Tools

    vp44

    Abstract: reliability test data CY37064P44 EME-6300 84-1MISR4 CY37064 JESD22 CY37064P44-YMB tsmc mos 45 84-1MIS
    Text: Cypress Semiconductor Product Qualification Report QTP# 000606 VERSION 2.1 September, 2000 High-Performance CPLDs CY37064P44 CY37064VP44 UltraLogic 64-Macrocell ISR™ CPLDs 5V CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director


    Original     		PDF CY37064P44 CY37064VP44 64-Macrocell CY37064P44/VP44 CY37064P44-JC 610000497N1 CY37064P44-YMB vp44 reliability test data CY37064P44 EME-6300 84-1MISR4 CY37064 JESD22 CY37064P44-YMB tsmc mos 45 84-1MIS

    CY37032V

    Abstract: CY37032
    Text: 56V Back PRELIMINARY CY37032V UltraLogicTM 32-Macrocell ISRTM CPLD — tPD = 8.5 ns Features — tS = 5.0 ns • 32 macrocells in two logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG-compliant on-board programming • • • • • •


    Original     		PDF CY37032V 32-Macrocell CY37032V CY37032

    Device-List

    Abstract: cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2
    Text: Device List Adapter List Converter List for ALL-11 JUL. 2000 Introduction T he Device List lets you know exactly which devices the Universal Programmer currently supports. The Device List also lets you know which devices are supported directly by the standard DIP socket and which


    Original     		PDF ALL-11 Z86E73 Z86E83 Z89371 ADP-Z89371/-PL Z8E000 ADP-Z8E001 Z8E001 Device-List cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2

    CY37512P208-100UMB

    Abstract: CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68
    Text: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM 222-MHz CY37512P208-100UMB CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68

    CY37032VP44-100AI

    Abstract: CY37064P44-154YMB CY37512P208-100UMB
    Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37032VP44-100AI CY37064P44-154YMB CY37512P208-100UMB

    ultraISR CABLE

    Abstract: CY37032P44-222JC 154J CY37032
    Text: CY37032 PRELIMINARY UltraLogicTM 32-Macrocell ISRTM CPLD — tS = 3.0 ns Features • 32 macrocells in two logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming • • • • • • • • • • — Design changes don’t cause pinout changes


    Original     		PDF CY37032 32-Macrocell 44-Lead ultraISR CABLE CY37032P44-222JC 154J CY37032

    vp44

    Abstract: CY37064 CY37064V
    Text: «oaHaoooiMMMWfMMMMMM!9:^ v’*'» -^ jjÉBT * ¿f5 ’00“’'* '^ 7“T{• < 1; .r - - •■■■■■■ c PRELIMINARY CY37064V 3, £ ,.* k v / k J UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 8.5ns Features — ts = 5.0 ns • 64 macrocells in four logic blocks


    OCR Scan     		PDF CY37064V 64-Macrocell vp44 CY37064 CY37064V

    Untitled

    Abstract: No abstract text available
    Text: ! ^ jjjjjy '•ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- JMNK ♦ PRELIMINARY t t *^ ' < ij / 5; CY37064 UltraLogic 64-Macrocell ISR™ CPLD — ts = 4.0 ns Features — tco = 4.0 ns • 64 macrocells in four logic blocks • In-System Reprogrammable™ (ISR™ JTAG-compliant


    OCR Scan     		PDF CY37064 64-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: CY37064V PR EU M IN Am UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 8.5ns Features — ts = 5.0 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.0 ns • • • • • • — JTAG-compliant on-board programming


    OCR Scan     		PDF CY37064V 64-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CY37064V UltraLogic 3.3V 64-Macrocell ISR™CLPD Features — tpo = 10 ns — ts = 5.5 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6 .5 ns • • • • • • — JTAG-compliant on-board programming


    OCR Scan     		PDF CY37064V 64-Macrocell

    CY37064

    Abstract: 032-l CERAMIC LEADLESS CHIP CARRIER CY37032 CY37064V CY7C372 CY7C373 100-PIN
    Text: =mmm!Æ ' ^ r ^ r : c Q PR£um A^ Y CY37064 UltraLogic 64-Macrocell ISR™ CPLD Features — ts = 4.0 ns — tco = 4.0 ns • 64 macrocells in four logic blocks • In-System Reprogrammable™ ISR™ JTAG-compliant on-board programming • • • •


    OCR Scan     		PDF CY37064 64-Macrocell CY37064 032-l CERAMIC LEADLESS CHIP CARRIER CY37032 CY37064V CY7C372 CY7C373 100-PIN

    Untitled

    Abstract: No abstract text available
    Text: ! ^ jjjjjy '•ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- J M N K ♦ t t < ij / 5; PRELIMINARY *^ ' CY37064 UltraLogic 64-Macrocell ISR™ CPLD Features — ts = 3.5 ns — tco = 4.5 ns • 64 macrocells in four logic blocks • In-System Reprogrammable™ (ISR™


    OCR Scan     		PDF CY37064 64-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: ! ^ jjjjjy '• ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- J M N K ♦ t t < ij / 5; PRELIMINARY *^ ' CY37064V UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ (ISR™


    OCR Scan     		PDF CY37064V 64-Macrocell

    cy37128

    Abstract: CY37128P160-125AC CY37128V CY7C375 CY37128P84-125JI cy3700
    Text: = m m m !Æ '^ r ^ r : c Q CY3 7 1 2 8 PR £um A ^Y UltraLogic 128-Macrocell ISR™ CPLD — tco = 4.0 ns Features • • • • • • • • • • • 128 macrocells in eight logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming


    OCR Scan     		PDF CY37128 128-Macrocell cy37128 CY37128P160-125AC CY37128V CY7C375 CY37128P84-125JI cy3700

    CY37064

    Abstract: No abstract text available
    Text: UltraLogic 64-Macrocell ISR™ CPLD — ts = 3.5 ns Features — tCo = 4 -5 ns • Product-term clocking 64 macrocells in four logic blocks In-System Reprogrammable™ ISR™ • IEEE 1149.1 JTAG boundary scan • Programmable slew rate control on individual l/Os


    OCR Scan     		PDF 64-Macrocell CY37064V, CY37032/ 37uctor CY37064

    CY37032V

    Abstract: No abstract text available
    Text: CY37032V PREUM INAm UltraLogic 32-Macrocell ISR™ CPLD — tPD = 8.5 ns Features — ts = 5.0 ns • 32 macrocells in two logic blocks • 3.3V In-System Reprogrammable™ ISR™ includes: — tco = 6.0 ns Product-term clocking IEEE 1149.1 JTAG boundary scan


    OCR Scan     		PDF CY37032V 32-Macrocell CY37032V

    clcc land pattern

    Abstract: CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern
    Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    OCR Scan     		PDF Ultra37000TM Ultra37000 22V10 clcc land pattern CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern