transistor C3866
Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
Text: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)
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STR-G6653
Abstract: STR-C6653 STR-G6653 circuit diagram part circuit str-g6653 strg6653 STRC6653 G6653 STR G6653 43Yin C6653
Text: 5 STR -G 6653 7 ? 7 A STR-C6653 block diagram -5 -1 s-m-mfe Function o f terminaJ Terminal 12 H Sym bol 1 D 2 S 3 CND 4 vw 5 5 .2 O .C Pflr.B « Description » fig Functions H H / S i Drain terminal M O S FET H V * i > M O S F E T drain MOS FET V - A Source terminal
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STR-G6653
STR-C6653
STR-G6653 circuit diagram
part circuit str-g6653
strg6653
STRC6653
G6653
STR G6653
43Yin
C6653
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Untitled
Abstract: No abstract text available
Text: SN74CBT3253 DUAL 4-BIT TO 1-BIT FET MULTIPLEXER/DEMULTIPLEXER I S C D S 0 1 8 - M AY 1995 D, DB, O R PW P A C K A G E TO P V IEW • Functionally Equivalent to QS3253 • 5 -Q Switch Connection Between Two Ports Ü E T I 1 U 16 1 V C C 15 ] OE2 S1 [ 2 14 ] S O
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SN74CBT3253
QS3253
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D2B4
Abstract: H1B13
Text: SN54ABT32543, SN74ABT32543 36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS230B - JUNE 1992 - REVISED JULY 1994 • Members of the Texas Instruments Wldebus+ Family • State-of-the-Art EPIC-llB™ BICMOS Design Significantly Reduces Power Dissipation
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SN54ABT32543,
SN74ABT32543
36-BIT
SCBS230B
JESD-17
-32-mA
64-mA
100-Pin
14-mm
SN74ABT32543.
D2B4
H1B13
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tlc5411
Abstract: No abstract text available
Text: TLC540I, TLC541I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS SLAS065A - OCTOBER 1983 - REVISED MARCH 1995 • 8-Bit Resolution A/D Converter • Microprocessor Peripheral or Stand-Alone Operation • On-Chip 12-Channel Analog Multiplexer
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TLC540I,
TLC541I
SLAS065A
12-Channel
TLC541
MC145040
ADC0811.
TLC540
TLC1540
10-Bit
tlc5411
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AR S178 DIODE
Abstract: TL051 Transistors wmv 93 S178-FEBRU TL0511
Text: TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLO S178-FEBRU ARY 1997 Direct Upgrades to TL07x and TL08x B iF E T Operational Amplifiers Faster Slew Rate 20 V/^is Typ Without Increased Power Consumption • On-Chip Offset Voltage Trimming for
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TL05x,
TL05xA,
TL05xY
S178-FEBRU
TL07x
TL08x
TL051
TL05x
AR S178 DIODE
Transistors wmv 93
TL0511
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P3336
Abstract: TIBPAL20R4-10C
Text: TIBPAL20L8-10C, TIBPAL20R4-10C, TIBPAL20R6-10C, TIBPAL20R8-10C HIGH-PERFORMANCE IMPACT-X PAL CIRCUITS SRPS008A- D3336, OCTOBER 1 9 6 9 - REVISED MARCH 1992 TIBPAL20L8' JT OR NT PACKAGE High-Performance Operation: fmax no feedback TIBPAL20R’ . . . 71.4 MHz
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TIBPAL20L8-10C,
TIBPAL20R4-10C,
TIBPAL20R6-10C,
TIBPAL20R8-10C
SRPS008A-
D3336,
TIBPAL20R'
TIBPAL20'
P3336
TIBPAL20R4-10C
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Untitled
Abstract: No abstract text available
Text: SN54HC139, SN74HC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS1Q8A - DECEM BER 1982 - R EVISED JANUARY 1996 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems SN54HC13 9 . . . J OR W PACKAQE SN74HC139. . . D, N, OR PW PACKAGE
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SN54HC139,
SN74HC139
300-mll
SN54HC13
SN74HC139.
HC139
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SN74AHCT138
Abstract: 3-line to 8-line
Text: SN74AHCT138 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCLS266 - DECEMBER 1995 D, DB, N, OR PW PACKAGE ftO P VIEW Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS) Process Designed Specifically for High-Speed Memory Decoders and Data Transmission
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SN74AHCT138
SCLS266
SN74AHCT138
24-Bit
ibl723
32-Bit
fltbl723
3-line to 8-line
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SN74LV08
Abstract: No abstract text available
Text: SN74LV08 QUADRUPLE 2-INPUT POSITIVE-AND GATE S C L S 1 86 A - FEBR UARY 1993 - REVISED JULY 1995 1 EPIC Enhanced-Performance Implanted CMOS 2-ji Process D, DB, OR PW PACKAGE CTOP VIEW) Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C
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SN74LV08
SCLS186A-FEBRUARY
1993-REVISED
MIL-STD-883C,
JESD-17
8S5303
SN74LV08
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SvW1
Abstract: 0B17
Text: SN74ABT7819 512 x 18 x 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCB812SD - JULY 1982 - REVISED SEPTEMBER 1995 Member of the Texas Instruments Wldebus Family Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Read and Write Operations Synchronized
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SN74ABT7819
SCB812SD
50-pF
80-Pln
SvW1
0B17
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SN74ALVC16260
Abstract: No abstract text available
Text: SN74ALVC16260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS252 - OCTOBER 1993 - REVISED MARCH 1994 * EPIC Enhanced-Performance Implanted CMOS Submicron Process DGQ OR DL PACKAGE (TOP VIEW) 1 2 55 j L E A 2 B 2B 3 [ 3 54 ] 2 B 4
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SN74ALVC16260
12-BIT
24-BIT
SCAS252
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Untitled
Abstract: No abstract text available
Text: SN74LVC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE _ SCAS288B-JANUARY 1993-REVISED JULY 1995 • EPIC Enhanced-Performance Implanted CMOS Submicron Process o, d b , o r p w p acka g e fTOP VIEW) • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds
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SN74LVC86
SCAS288B-JANUARY
1993-REVISED
MIL-STD-883C,
JESD-17
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LVT16835
Abstract: SN74LVT16835 SN54LVT16835
Text: SN54LVT16835, SN74LVT16835 3.3-V ABT 18-BIT UNIVERSAL BUS DRIVERS WITH 3-STATE OUTPUTS _ State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation Members of the Texas Instruments Widebus Family
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SN54LVT16835,
SN74LVT16835
18-BIT
SCBS309
300-mil
clbl723
LVT16835
SN54LVT16835
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Untitled
Abstract: No abstract text available
Text: SN74LVC16244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS 3CES081A - DECEMBER 1 9 95 - REVISED JANUARY 1998 DQQ OR DL PACKAOE TOP VIEW Member of the Texas Instruments Wldebus Family EP/C™ (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q l p (Output Ground Bounce)
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SN74LVC16244A
16-BIT
3CES081A
MIL-STD-883C,
JESD-17
300-mll
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SN74LV164
Abstract: No abstract text available
Text: SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTER SCLS191 A - FEBRUARY 1 9 9 3 - REVISED JULY 1995 • EPIC Enhanced-Performance Implanted CMOS 2-|x Process • Typical Vq lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C • Typical Vq h v (Output Vqh Undershoot)
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SN74LV164
SCLS191
MIL-STD-883C,
JESD-17
SN74LV164
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1B10
Abstract: 1B12 SN74ALVCH16269 Q1023
Text: SN74ALVCH16269 12-BIT TO 24-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES019-JULY 1995 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process
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SN74ALVCH16269
12-BIT
24-BIT
SCES019-JULY
MIL-STD-883C,
JESD-17
flTbl723
1B10
1B12
Q1023
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7SJ66
Abstract: No abstract text available
Text: SN74ALVC16646 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS265 - JANUARY 1993 - REVISED MARCH 1994 Member of the Texas Instruments Wldebus Family DGQ OR DL PACKAGE TOP VIEW Designed to Facilitate Incident-Wave Switching for Line Impedances of 50 Cl
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SN74ALVC16646
16-BIT
SCAS265
300-mil
7SJ66
7SJ66
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Untitled
Abstract: No abstract text available
Text: SN54LVT574, SN74LVT574 3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS1390 - MAY 1992 - REVISED JULY 1995 SN54LVT574. . . J OR W PACKAGE SN74LVT574 . . . DB, DW, OR PW PACKAGE TOP VIEW • State-of-the-Art Advanced BICMOS Technology (ABT) Design for 3.3-V
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SN54LVT574,
SN74LVT574
SCBS1390
MIL-STD-883C,
JESD-17
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CDC509
Abstract: No abstract text available
Text: CDC509 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS576A - JULY 1996 - REVISED OCTOBER 1996 Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications Distributes One Clock Input to One Bank of Five and One Bank of Four Outputs Separate Output Enable for Each Output
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CDC509
SCAS576A
24-Pin
011D213
75Z65
SCAS576A-
7526S
CDC509
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Untitled
Abstract: No abstract text available
Text: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY _ SCAS201 - MARCH 1991 - REVISED APRIL 1992 • • • • • • • • • • • • Member of the Texas Instruments Widebus Family Free-Running Read and Write Clocks Can
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SN74ACT7805
SCAS201
50-pF
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Q121
Abstract: Q201 SN74ALVCH16721
Text: SN74ALVCH16721 3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS SCES0S2 - JULY 1995 • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds
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SN74ALVCH16721
20-BIT
MIL-STD-883C,
JESD-17
300-mil
Q121
Q201
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Untitled
Abstract: No abstract text available
Text: SN54LVT2952, SN74LVT2952 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS I SCBS162E - MAY 1992 - REVISED JULY 199S I SN54LVT2952 . . . JT PACKAGE SN74LVT2952 . . . DB, DW, OR PW PACKAGE TOP VIEW • State-of-the-Art Advanced BICMOS Technology (ABT) Design for 3.3-V
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SN54LVT2952,
SN74LVT2952
SCBS162E
MIL-STD-883C,
JESD-17
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DA312
Abstract: No abstract text available
Text: SN65C185, SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065C - AUG UST 19B9 - REVISED MAY 1995 Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 DW OR N PACKAGE TOP VIEW • E 1 RA1 [ 2 RA2 [ 3 Single Chip With Easy Interface Between
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SN65C185,
SN75C185
SLLS065C
EIA/TIA-232-E
SN75185
DA312
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