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    CD74ACT10 Search Results

    CD74ACT10 Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    CD74ACT109ME4 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74ACT109M96 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74ACT10M Texas Instruments Triple 3-Input NAND Gates 14-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74ACT10M96 Texas Instruments Triple 3-Input NAND Gates 14-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74ACT10E Texas Instruments Triple 3-Input NAND Gates 14-PDIP -55 to 125 Visit Texas Instruments Buy
    CD74ACT109M Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments Buy
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    CD74ACT10 Price and Stock

    Rochester Electronics LLC CD74ACT10E

    IC GATE NAND 3CH 3-INP 14DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CD74ACT10E Tube 20,221 581
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    Rochester Electronics LLC CD74ACT10M

    IC GATE NAND 3CH 3-INP 14SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CD74ACT10M Tube 4,200 560
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    Rochester Electronics LLC CD74ACT109M96

    CD74ACT109 DUAL POSITIVE-EDGE TR
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    DigiKey CD74ACT109M96 Bulk 3,799 740
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    Rochester Electronics LLC CD74ACT109M

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    DigiKey CD74ACT109M Tube 3,568 573
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    Texas Instruments CD74ACT109M96

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    DigiKey CD74ACT109M96 Cut Tape 2,508 1
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    CD74ACT109M96 Digi-Reel 1
    • 1 $0.94
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    CD74ACT109M96 Reel 2,500
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    Mouser Electronics CD74ACT109M96 7,452
    • 1 $0.89
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    Rochester Electronics CD74ACT109M96 3,799 1
    • 1 $0.4098
    • 10 $0.4098
    • 100 $0.3852
    • 1000 $0.3483
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    CD74ACT10 Datasheets (54)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CD74ACT10 Texas Instruments Triple 3-Input NAND Gate Original PDF
    CD74ACT109 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset Original PDF
    CD74ACT109E Texas Instruments Dual J-Inverted K Positive-Edge-Triggered Flip-Flops with Clear and Preset Original PDF
    CD74ACT109E Texas Instruments DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET Original PDF
    CD74ACT109E Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF
    CD74ACT109E Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Scan PDF
    CD74ACT109E Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    CD74ACT109EE4 Texas Instruments DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR and PRESET Original PDF
    CD74ACT109EE4 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF
    CD74ACT109EG4 Texas Instruments Integrated Circuits (ICs) - Logic - Flip Flops - IC FF JK TYPE DUAL 1BIT 16DIP Original PDF
    CD74ACT109M Texas Instruments Dual J-Inverted K Positive-Edge-Triggered Flip-Flops with Clear and Preset Original PDF
    CD74ACT109M Texas Instruments DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET Original PDF
    CD74ACT109M Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF
    CD74ACT109M Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Scan PDF
    CD74ACT109M Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    CD74ACT109M96 Texas Instruments Dual J-Inverted K Positive-Edge-Triggered Flip-Flops with Clear and Preset Original PDF
    CD74ACT109M96 Texas Instruments DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET Original PDF
    CD74ACT109M96 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF
    CD74ACT109M96E4 Texas Instruments DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR and PRESET Original PDF
    CD74ACT109M96E4 Texas Instruments Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF

    CD74ACT10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CD54ACT109

    Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 CD54ACT109 24-mA MIL-STD-883, ACT109 CD54ACT109 CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96

    CD54ACT109

    Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 CD54ACT109 24-mA MIL-STD-883, ACT109 CD54ACT109 CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96

    Untitled

    Abstract: No abstract text available
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883,

    CD74ACT10

    Abstract: CD74ACT10E CD74ACT10EE4 CD74ACT10M CD74ACT10M96 CD74ACT10M96E4
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883, CD74ACT10 11-Mar-2008 CD74ACT10M96 CD74ACT10E CD74ACT10EE4 CD74ACT10M CD74ACT10M96 CD74ACT10M96E4

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 CD54ACT109 24-mA MIL-STD-883, ACT109

    CD54ACT109

    Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 CD54ACT109 24-mA MIL-STD-883, ACT109 CD54ACT109 CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    CD74ACT10

    Abstract: CD74ACT10E CD74ACT10M CD74ACT10M96
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883, CD74ACT10 CD74ACT10E CD74ACT10M CD74ACT10M96

    iC ACT10

    Abstract: AC10 CD74AC10 CD74AC10E CD74AC10M CD74ACT10 CD74ACT10E CD74ACT10M
    Text: CD74AC10, CD74ACT10 Data sheet acquired from Harris Semiconductor SCHS227 Triple 3-Input NAND Gate September 1998 Features Description • Typical Propagation Delay - 6ns at VCC = 5V, TA = 25oC, CL = 50pF The CD74AC10 and CD74ACT10 are triple 3-input NAND


    Original
    PDF CD74AC10, CD74ACT10 SCHS227 CD74AC10 CD74ACT10 MIL-STD-883, ACT10 iC ACT10 AC10 CD74AC10E CD74AC10M CD74ACT10E CD74ACT10M

    CD74ACT10

    Abstract: CD74ACT10E CD74ACT10EE4 CD74ACT10M CD74ACT10M96 CD74ACT10M96E4
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883, CD74ACT10 CD74ACT10E CD74ACT10EE4 CD74ACT10M CD74ACT10M96 CD74ACT10M96E4

    CD74ACT109E

    Abstract: No abstract text available
    Text: Data sheet acquired from Harris Semiconductor SCHS282 This data sheet is applicable to the CD54/74AC109, CD54AC112, CD45ACT109, and CD54ACT112. See SCHS233 for information on the CD74AC112, CD74ACT109, and CD74ACT112. IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue


    Original
    PDF SCHS282 CD54/74AC109, CD54AC112, CD45ACT109, CD54ACT112. SCHS233 CD74AC112, CD74ACT109, CD74ACT112. limit06/01/1997) CD74ACT109E

    CD54ACT109

    Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 CD54ACT109 24-mA MIL-STD-883, ACT109 CD54ACT109 CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96

    Untitled

    Abstract: No abstract text available
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883,

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    Untitled

    Abstract: No abstract text available
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883,

    CD74ACT10

    Abstract: CD74ACT10E CD74ACT10M CD74ACT10M96
    Text: CD74ACT10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCHS316 – NOVEMBER 2002 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With D D D D E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current


    Original
    PDF CD74ACT10 SCHS316 24-mA MIL-STD-883, CD74ACT10 CD74ACT10E CD74ACT10M CD74ACT10M96

    Untitled

    Abstract: No abstract text available
    Text: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With


    Original
    PDF CD54ACT109, CD74ACT109 SCHS327 24-mA MIL-STD-883, CD54ACT109 CD74ACT109 ACT109

    s227

    Abstract: cd74act10
    Text: CD74AC10, CD74ACT10 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCH S227 Triple 3-Input NAND Gate September 1998 Features Description • Typical Propagation Delay The CD74AC10 and CD74ACT10 are triple 3-input NAND gates that utilize the Harris Advanced CMOS Logic technology.


    OCR Scan
    PDF CD74AC10, CD74ACT10 CD74AC10 CD74ACT10 MIL-STD-883, s227