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    CA2-DN 40 Search Results

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    MBI5170CD

    Abstract: MBI5001CD MBI5001CN MBI5168 MBI5170 MBI5170CN MBI5170CP SDO-15
    Text: MBI5170 Preliminary Datasheet Macroblock 8-bit Constant Current LED Sink Driver with Gain Control Features l l l l l l l l l l MBI5170CN MBI5001CN 8 constant-current output channels Output current adjustable through an external resistor Output current gain programmable for White Balance


    Original     		PDF MBI5170 MBI5170CN MBI5001CN 25MHz DIP16-P-300-2 MBI5170CD MBI5001CD OP16-P-150-1 MBI5170CD MBI5001CD MBI5001CN MBI5168 MBI5170 MBI5170CN MBI5170CP SDO-15

    MBI5026

    Abstract: MBI5028CF mbi5026 datasheets MBI5028 MBI5016CF MBI5016CNS MBI5016CP MBI5028CNS MBI5028CP
    Text: MBI5028 Preliminary Datasheet Macroblock 16-bit Constant Current LED Sink Driver with Gain Control Features • 16 constant-current output channels · Output current adjustable through an external resistor · Output current gain programmable for White Balance


    Original     		PDF MBI5028 16-bit 25MHz MBI5028CNS MBI5016CNS MBI5016CF MBI5028CF MBI5028CP MBI5016CP MBI5026 MBI5028CF mbi5026 datasheets MBI5028 MBI5016CF MBI5016CNS MBI5016CP MBI5028CNS MBI5028CP

    MBI5026

    Abstract: SOP24-300-1 MBI5028 MBI5016CF MBI5016CNS MBI5016CP MBI5028CP SSOP24-150-0 MBI5028CPA
    Text: Macroblock MBI5028 Preliminary Datasheet 16-bit Constant Current LED Sink Driver with Gain Control Features MBI5028CN\CNS MBI5016CNS MBI5016CNS l 16 constant-current output channels l Output current adjustable through an external resistor l Programmable output current gain for White Balance


    Original     		PDF MBI5028 16-bit MBI5028CN\CNS MBI5016CNS P-DIP24-300-2 SP-DIP24-300-1 MBI5016CF MBI5028CD\CF MBI5026 SOP24-300-1 MBI5028 MBI5016CF MBI5016CNS MBI5016CP MBI5028CP SSOP24-150-0 MBI5028CPA

    IQ64BTQ100

    Abstract: P005 IDS200 IQ320 p022 p041 p055 power transistor IQ32B IQ48 IQ64B
    Text: IQ Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConnect parallel interface for fast, incremental


    Original     		PDF

    IEC 158-1 VDE 0660

    Abstract: CA3DN22 CA2-DN40 ca2-Dn22 VDE 0660 iec 158-1 telemecanique CA2 ft 111 telemecanique IEC 158-1 CA3-DN22 CA2-DN 131 ca2dk22
    Text: File 8501 February 1996 IEC INDUSTTRIAL CONTROL RELAYS Catalog CONTENTS Description Page General Information . 1 Control Relays CA2D and CA3D . 2-17


    Original     		PDF 8501CT9501 IEC 158-1 VDE 0660 CA3DN22 CA2-DN40 ca2-Dn22 VDE 0660 iec 158-1 telemecanique CA2 ft 111 telemecanique IEC 158-1 CA3-DN22 CA2-DN 131 ca2dk22

    1K x 8 static ram dip22

    Abstract: EASE-AN-4050 uPD703128 ca2 dn 1319 uPD703129 transistors F6 DD52 transistor dd52 F12a U15839EE1V0UM00 upD70312
    Text: Preliminary User’s Manual TM V850E/CA2 JUPITER 32-/16-bit Romless Microcontroller Hardware µPD703128, µPD703129 Document No. U15839EE1V0UM00 Date Published August 2003  NEC Corporation 2003 Printed in Germany NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS


    Original     		PDF V850E/CA2 32-/16-bit PD703128, PD703129 U15839EE1V0UM00 electricity6130 1K x 8 static ram dip22 EASE-AN-4050 uPD703128 ca2 dn 1319 uPD703129 transistors F6 DD52 transistor dd52 F12a U15839EE1V0UM00 upD70312

    Untitled

    Abstract: No abstract text available
    Text: PSX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Programmable Bus Widths of 4, 8, 16 and 32 bits — Identical and Predictable Delays — One-to-One, One-to-Many and Many-to-One Connections


    Original     		PDF 133MHz

    p055 TRANSISTOR

    Abstract: p055 power transistor Bus repeater
    Text: PSX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Programmable Bus Widths of 4, 8, 16 and 32 bits — Identical and Predictable Delays The PSX160, PSX128B and PSX96B are SRAM-based bus


    Original     		PDF 133MHz p055 TRANSISTOR p055 power transistor Bus repeater

    SLGSSTE32882-A04B

    Abstract: DDR3U SLGSSTE32882 SLGSSTE32882-B04B DDR3L DDR3U-1333 ddr3 RDIMM pinout XLXX JESD79-3 RC10
    Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1333 , 1.35V (up to DDR3L-1333), and 1.5V (up to DDR3-1600)


    Original     		PDF SLGSSTE32882 28-bit 26-bit DDR3U-1333) DDR3L-1333) DDR3-1600) 176-TFBGA 000-0032882-10g SLGSSTE32882-A04B DDR3U SLGSSTE32882 SLGSSTE32882-B04B DDR3L DDR3U-1333 ddr3 RDIMM pinout XLXX JESD79-3 RC10

    XLXX

    Abstract: SSTE32882 dba1 SSTE32882HLB JESD8-11A
    Text: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the


    Original     		PDF SSTE32882HLB 28-bit 26-bit SSTE32882Hd 32882HLB SSTE32882HLB XLXX SSTE32882 dba1 JESD8-11A

    DDR3 rdimm pcb layout

    Abstract: SSTE32882KA1 XLXX SSTE32882 407 MTS controller LX-XX
    Text: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock


    Original     		PDF SSTE32882KA1 28-bit 26-bit SSTE32882HLBAKG SSTE32882HLBAKG8 SSTE32882HLBBKG SSTE32882HLBBKG8 SSTE32882KA1 19-Aug-2010 DDR3 rdimm pcb layout XLXX SSTE32882 407 MTS controller LX-XX

    407 MTS controller

    Abstract: XLXX JESD8-11A pinout DDR3-1333 DDR3 rdimm pcb layout
    Text: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock


    Original     		PDF SSTE32882KA1 28-bit 26-bit 32882KA1 SSTE32882KA1 407 MTS controller XLXX JESD8-11A pinout DDR3-1333 DDR3 rdimm pcb layout

    cK 7201

    Abstract: SSTE32882 SSTE32882HLB xlxx transistor DA3 307 qbba1 dba1 DDR3 layout DDR3 pcb layout DDR3L
    Text: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the


    Original     		PDF 28-bit 26-bit SSTE32882HLB 32882HLB SSTE32882HLB cK 7201 SSTE32882 xlxx transistor DA3 307 qbba1 dba1 DDR3 layout DDR3 pcb layout DDR3L

    DDR3U

    Abstract: DDR3U-1866 SLGSSTE32882 top 261 yn JESD79-3 dba1 DDR3L DDR3-2133 RC10 RC11
    Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1866 , 1.35V (up to DDR3L-1866), and 1.5V (up to DDR3-2133)


    Original     		PDF SLGSSTE32882 28-bit 26-bit DDR3U-1866) DDR3L-1866) DDR3-2133) 176-TFBGA 25hich DDR3U DDR3U-1866 SLGSSTE32882 top 261 yn JESD79-3 dba1 DDR3L DDR3-2133 RC10 RC11

    Untitled

    Abstract: No abstract text available
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is


    Original     		PDF power5465056,

    Untitled

    Abstract: No abstract text available
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is


    Original     		PDF power734334,

    P009

    Abstract: 7624k p055 TRANSISTOR P019
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is


    Original     		PDF power65056, P009 7624k p055 TRANSISTOR P019

    QUAD D FLIP-FLOP

    Abstract: enable40 IQX320 P089 marking IQX128B IQX160 IQX240B p005 ab 48 tag 91 IQX320-10PB416 gc153
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is


    Original     		PDF

    AB P89 zener

    Abstract: Zener diode MARKING P035 252 B34 ZENER DIODE Zener diode MARKING P044 ZENER diode p317 Zener Diode p047 p014 DD 127 D TRANSISTOR zener AF4 on semiconductor marking code P008
    Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConfigure parallel interface for fast, incremental


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation. All inputs are 1.25,1.35V and 1.5V CMOS compatible, except the


    Original     		PDF 28-bit 26-bit 32882KB1 SSTE32882KB1

    SSTE32882KA1

    Abstract: No abstract text available
    Text: DATASHEET Advanced Information 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation.


    Original     		PDF 28-bit 26-bit 32882KA1 SSTE32882KA1 SSTE32882KA1

    P057C

    Abstract: P050C P052C P060C p055 power transistor P056C P062C P054C P005 p048
    Text: " L # I-C u b e IQ Fam ily Data Sheet m F eatures D e s c r ip tio n • SRAM -based, in-system programmable The IQ family of SRAM -based bit-oriented switching devices is • Switch Matrix manufactured using 0.6|jm C M O S processes. T hese devices — Non-Blocking


    OCR Scan     		PDF IQ64B-J84 IQ48-PQ80 IQ32B IQ32B-TQ52 IQ64B IQ32B 144PQ 144TQ 100TQ P057C P050C P052C P060C p055 power transistor P056C P062C P054C P005 p048

    p055 TRANSISTOR

    Abstract: P029H H27 j1 3009 transistor P239 P239 9 318 ITT ZPY ZPY 91 ITT P109t P104t P182C
    Text: & 1-Cube IQ Family Data Sheet Description Features The IQ devices are designed for use in switching and interconnect applications. In switching applications, these devices are used to dynamically switch one or more signals. When used in interconnect applications, the IQ devices


    OCR Scan     		PDF 3201/O IQ32B 00D0b4b p055 TRANSISTOR P029H H27 j1 3009 transistor P239 P239 9 318 ITT ZPY ZPY 91 ITT P109t P104t P182C