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    BWC 110 TRANSISTOR Search Results

    BWC 110 TRANSISTOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TTC5886A Toshiba Electronic Devices & Storage Corporation NPN Bipolar Transistor / hFE=400~1000 / VCE(sat)=0.22V / tf=120ns Visit Toshiba Electronic Devices & Storage Corporation
    TTA2097 Toshiba Electronic Devices & Storage Corporation PNP Bipolar Transistor / hFE=200~500 / VCE(sat)=-0.27V / tf=60ns Visit Toshiba Electronic Devices & Storage Corporation
    XPQR8308QB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 80 V, 350 A, 0.00083 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    XPQ1R00AQB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 100 V, 300 A, 0.00103 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    TK190U65Z Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 650 V, 15 A, 0.19 Ohm@10V, TOLL Visit Toshiba Electronic Devices & Storage Corporation

    BWC 110 TRANSISTOR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C1347D-200AC

    Abstract: CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC CY7C1347D
    Text: CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM Features Functional Description • Fast access times: 2.5 and 3.5 ns This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell


    Original     		PDF CY7C1347D BG119) 166BGA, 200BGA, 225AC CY7C1347D-200AC CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC CY7C1347D

    CY7C1347D

    Abstract: CY7C1347D-200AC CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC 4N70
    Text: CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM Features Functional Description • Fast access times: 2.5 and 3.5 ns This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell


    Original     		PDF CY7C1347D CY7C1347D: BG119) 166BGA, 200BGA, 225AC CY7C1347D CY7C1347D-200AC CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC 4N70

    Untitled

    Abstract: No abstract text available
    Text: CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM Features Functional Description • Fast access times: 2.5 and 3.5 ns This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell


    Original     		PDF CY7C1347D CY7C1347D: BG119) 166BGA, 200BGA, 225AC

    CY7C1347D

    Abstract: CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC
    Text: 327 CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM Features • • • • • • • • • • • • • • • • • • • Fast access times: 2.5 and 3.5 ns Fast clock speed: 250, 225, 200, and 166 MHz 1.5 ns set-up time and 0.5 ns hold time


    Original     		PDF CY7C1347D CY7C1347D: CY7C1347D CY7C1347D-225BGC CY7C1347D-250AC CY7C1347D-250BGC

    CY7C1347D-250BGC

    Abstract: CY7C1347D CY7C1347D-225BGC CY7C1347D-250AC
    Text: 327 CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM Features • • • • • • • • • • • • • • • • • • • Fast access times: 2.5 and 3.5 ns Fast clock speed: 250, 225, 200, and 166 MHz 1.5 ns set-up time and 0.5 ns hold time


    Original     		PDF CY7C1347D CY7C1347D: BG119) CY7C1347D-250BGC CY7C1347D CY7C1347D-225BGC CY7C1347D-250AC

    4918A

    Abstract: CY7C1327C GVT71256DA18
    Text: CY7C1347C/GVT71128DA36 CY7C1327C/GVT71256DA18 256K x 18/128K x 36 Synchronous-Pipelined Cache RAM Features • • • • • • • • • • • • • • • • • • • Fast access times: 2.5 and 3.5 ns Fast clock speed: 250, 225, 200, and 166 MHz


    Original     		PDF CY7C1347C/GVT71128DA36 CY7C1327C/GVT71256DA18 18/128K 4918A CY7C1327C GVT71256DA18

    GVT71128DA36

    Abstract: GVT71256DA18
    Text: ADVANCE INFORMATION GALVANTECH, INC. GVT71128DA36/GVT71256DA18 128K X 36/256K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT 128K x 36 SRAM 256K x 18 SRAM +3.3V SUPPLY, FULLY REGISTERED FEATURES GENERAL DESCRIPTION • • • • • The Galvantech Synchronous Burst SRAM family


    Original     		PDF GVT71128DA36/GVT71256DA18 36/256K GVT71128DA36 GVT71256DA18 072x36 144x18 71128DA36 71256DA18

    GVT71256D36

    Abstract: GVT71512D18 3G MARKING
    Text: GALVANTECH, INC. GVT71256D36/GVT71512D18 256K X 36/512K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • • • • Fast access times: 2.5ns, 3.0ns, and 3.5ns Fast clock speed: 225, 200, 166, and 150MHz


    Original     		PDF GVT71256D36/GVT71512D18 36/512K 150MHz 71512D18 GVT71256D36 GVT71512D18 3G MARKING

    GVT71256C36

    Abstract: GVT71512C18 4h35
    Text: GALVANTECH, INC. GVT71256C36/GVT71512C18 256K X 36/512K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • • • • Fast access times: 2.5ns, 3.0ns, and 3.5ns Fast clock speed: 225, 200, 166, and 150MHz


    Original     		PDF GVT71256C36/GVT71512C18 36/512K 150MHz 71256C36 71512C18 GVT71256C36 GVT71512C18 4h35

    100-PIN

    Abstract: GVT71256ZC36 GVT71512ZC18
    Text: PRELIMINARY GVT71256ZC36/GVT71512ZC18 256K X 36/512K X 18 ZBL SRAM GALVANTECH, INC. SYNCHRONOUS ZBL SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • Zero Bus Latency, no dead cycles between write and read cycles Fast clock speed: 200, 166, 133, and 100MHz


    Original     		PDF GVT71256ZC36/GVT71512ZC18 36/512K 100MHz LO36/GVT71512ZC18 71256ZC36 71512ZC18 100-PIN GVT71256ZC36 GVT71512ZC18

    100-PIN

    Abstract: GVT71256ZB36 GVT71512ZB18 4g81
    Text: PRELIMINARY GVT71256ZB36/GVT71512ZB18 256K X 36/512K X 18 ZBL SRAM GALVANTECH, INC. SYNCHRONOUS 256K x 36 SRAM ZBL SRAM 512K x 18 SRAM FLOW-THRU OUTPUT +3.3V SUPPLY, +3.3V or +2.5V I/O FEATURES • • • • • • • • • • • • • • • Zero Bus Latency, no dead cycles between write and read


    Original     		PDF GVT71256ZB36/GVT71512ZB18 36/512K 100MHz capabi36/GVT71512ZB18 71256ZB36 access/10ns 71512ZB18 100-PIN GVT71256ZB36 GVT71512ZB18 4g81

    CY7C1360A1-150AC

    Abstract: CY7C1362A1 GVT71512DA18
    Text: CY7C1360A1/GVT71256DA36 CY7C1362A1/GVT71512DA18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM eral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original     		PDF CY7C1360A1/GVT71256DA36 CY7C1362A1/GVT71512DA18 36/512K CY7C1360A1-150AC CY7C1362A1 GVT71512DA18

    GVT71256D36B-5

    Abstract: CY7C1362A GVT71512D18 7c136
    Text: 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original     		PDF 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K GVT71256D36B-5 CY7C1362A GVT71512D18 7c136

    100-PIN

    Abstract: GVT71256ZC36 GVT71512ZC18
    Text: ADVANCE INFORMATION GVT71512ZC36/GVT71A24ZC18 512K X 36/1M X 18 ZBL SRAM GALVANTECH, INC. SYNCHRONOUS ZBL SRAM PIPELINED OUTPUT 512K x 36 SRAM 1M x 18 SRAM +3.3V SUPPLY, +3.3V or +2.5V I/O FEATURES GENERAL DESCRIPTION • The GVT71512ZC36 and GVT71A24ZC18 SRAMs are


    Original     		PDF GVT71512ZC36/GVT71A24ZC18 36/1M GVT71512ZC36 GVT71A24ZC18 288x36 576x18 71512ZC36 71A24ZC18 100-PIN GVT71256ZC36 GVT71512ZC18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original     		PDF CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K

    CY7C1367A

    Abstract: GVT71512C18
    Text: CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 256K x 36/512K x 18 Pipelined SRAM Features and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous


    Original     		PDF CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 36/512K CY7C1367A GVT71512C18

    CY7C1367A

    Abstract: GVT71512C18 CY7C1367A-166AC 6n35
    Text: CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original     		PDF CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 36/512K CY7C1367A GVT71512C18 CY7C1367A-166AC 6n35

    CY7C1363A

    Abstract: GVT71256B36 GVT71512B18
    Text: CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 256K x 36/512K x 18 Synchronous Burst Flowthrough SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positiveedge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip


    Original     		PDF CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 36/512K CY7C1363A GVT71256B36 GVT71512B18

    marking 3U 3T 3C diode 3E 3G

    Abstract: GVT71256B36 GVT71512B18
    Text: GALVANTECH, INC. GVT71256B36/GVT71512B18 256K X 36/512K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM FLOW-THROUGH FEATURES • • • • • • • • • • • • • • • • • • Fast access times: 6.0, 6.5, 7.0, and 8.0ns Fast clock speed: 150, 133, 117, and 100MHz


    Original     		PDF GVT71256B36/GVT71512B18 36/512K 100MHz 71256B36 access/10ns 71512B18 marking 3U 3T 3C diode 3E 3G GVT71256B36 GVT71512B18

    GALVANTECH ZBL

    Abstract: CY7C1354A CY7C1356A
    Text: CY7C1354A CY7C1356A 256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between Write and Read cycles • Fast clock speed: 200, 166, 133, 100 MHz • Fast access time: 3.2, 3.6, 4.2, 5.0 ns • Internally synchronized registered outputs eliminate


    Original     		PDF CY7C1354A CY7C1356A 36/512K BG119) 38-05161Rev. GALVANTECH ZBL CY7C1354A CY7C1356A

    CY7C1363A

    Abstract: GVT71256B36 GVT71512B18 GVT71512B18TA-8
    Text: 1CY7C1361A CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 256K x 36/512K x 18 Synchronous Burst Flowthrough SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positiveedge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip


    Original     		PDF 1CY7C1361A CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 36/512K CY7C1363A GVT71256B36 GVT71512B18 GVT71512B18TA-8

    GVT71256B36T-7

    Abstract: CY7C1363A GVT71256B36 GVT71512B18 926B1 a453t GVT71256B36TA
    Text: 1CY7C1361A CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 256K x 36/512K x 18 Synchronous Burst Flowthrough SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positiveedge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip


    Original     		PDF 1CY7C1361A CY7C1361A/GVT71256B36 CY7C1363A/GVT71512B18 36/512K clock2001. GVT71256B36T-7 CY7C1363A GVT71256B36 GVT71512B18 926B1 a453t GVT71256B36TA

    CY7C1356A

    Abstract: GVT71512ZC18
    Text: CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between Write and Read cycles • Fast clock speed: 200, 166, 133, 100 MHz • Fast access time: 3.2, 3.6, 4.2, 5.0 ns


    Original     		PDF CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 36/512K BG119) CY7C1356A GVT71512ZC18

    100-PIN

    Abstract: No abstract text available
    Text: PRELIMINARY GVT75256ZC36/GVT75512ZC18 256K X 36/512K X 18 ZBL SRAM GALVANTECH, INC. SYNCHRONOUS ZBL SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • Zero Bus Latency, no dead cycles between write and read cycles Fast clock speed: 150, 133, and 100MHz


    Original     		PDF GVT75256ZC36/GVT75512ZC18 36/512K 100MHz 75256ZC36 75512ZC18 100-PIN