CY7C1362A
Abstract: GVT71512D18
Text: CY7C1360A/GVT71256D36 CY7C1362A/71512D18 256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Features • • • • • • • • • • • • • • • • • • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns Fast clock speed: 225, 200, 166, and 150 MHz
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CY7C1360A/GVT71256D36
CY7C1362A/GVT71512D18
36/512K
CY7C1360A/GVT71256D36
CY7C1362A
GVT71512D18
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Untitled
Abstract: No abstract text available
Text: CY7C1360A/GVT71256D36 CY7C1362A/71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining
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PDF
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CY7C1360A/GVT71256D36
CY7C1362A/GVT71512D18
36/512K
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Untitled
Abstract: No abstract text available
Text: 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining
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PDF
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1CY7C1329
CY7C1360A/GVT71256D36
CY7C1362A/GVT71512D18
36/512K
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EPM5128LC
Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C
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CY2148-35C
CY21L48-35C
CY7C168A-35C
CY7C168A-25C
5962-8871309XX
5962-89839112X
CY7C148-35C
CY7C168A-45M
CY7C168A-35M+
EPM5128LC
IDT CYPRESS CROSS REFERENCE clocks
epm5064lc-1
EPM5128LC-1
EPM5064LC
EPM5128LC-2
EPM5128GI
EPM5128JC-1
8464c
5962-8871309
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GVT71256D36B-5
Abstract: CY7C1362A GVT71512D18 7c136
Text: 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining
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Original
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PDF
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1CY7C1329
CY7C1360A/GVT71256D36
CY7C1362A/GVT71512D18
36/512K
GVT71256D36B-5
CY7C1362A
GVT71512D18
7c136
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GVT71256D36
Abstract: GVT71512D18 3G MARKING
Text: GALVANTECH, INC. GVT71256D36/71512D18 256K X 36/512K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • • • • Fast access times: 2.5ns, 3.0ns, and 3.5ns Fast clock speed: 225, 200, 166, and 150MHz
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GVT71256D36/GVT71512D18
36/512K
150MHz
71512D18
GVT71256D36
GVT71512D18
3G MARKING
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