Untitled
Abstract: No abstract text available
Text: APPLICATION NOTE R8C/Tiny Series General-purpose Program for Compressing BCD 1. Abstract This program converts 2-digit unpacked BCD data into 1-digit packed BCD. 2. Introduction This program converts 2-digit unpacked BCD data into 1-digit packed BCD. Set the 2-digit unpacked BCD data in a
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REJ05B0271-0100Z/Rev
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Untitled
Abstract: No abstract text available
Text: APPLICATION NOTE M16C/60 Series and M16C/20 Series General-purpose Program for Compressing BCD 1. Abstract This program converts 2-digit unpacked BCD data into 1-digit packed BCD. 2. Introduction This program converts 2-digit unpacked BCD data into 1-digit packed BCD. Set the 2-digit unpacked BCD data in a
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M16C/60
M16C/20
REJ05B0155-0100Z/Rev
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MC14527B
Abstract: MC14527Bs "MOTOROLA CMOS LOGIC DATA" MC14527 MC14XXXBCL MC14XXXBCP MC14XXXBDW 066ns BCD Rate Multiplier
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14527B BCD Rate Multiplier The MC14527B BCD rate multiplier DRM provides an output pulse rate based upon the BCD input number. For example, if 6 is the BCD input number, there will be six output pulses for every ten input pulses. This part
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MC14527B
MC14527B
MC14527B/D*
MC14527B/D
MC14527Bs
"MOTOROLA CMOS LOGIC DATA"
MC14527
MC14XXXBCL
MC14XXXBCP
MC14XXXBDW
066ns
BCD Rate Multiplier
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1e31
Abstract: 1E20 SUBTRACTION
Text: APPLICATION NOTE H8/300L Series Subtraction of 8-Digit BCD Numbers SUBD1 Introduction 1. The software SUBD1 subtracts an 8-digit binary-coded decimal (BCD) number from another 8-digit BCD number and places the result (an 8-digit BCD number) in general-purpose registers.
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H8/300L
REJ06B0160-0100Z/Rev
1e31
1E20
SUBTRACTION
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001C
Abstract: F604
Text: APPLICATION NOTE H8/300L Series Multiplication of 4-Digit BCD Numbers MULD Introduction 1. The software MULD multiplies a 4-digit binary-coded decimal (BCD) number by another 4- digit BCD number and places the result (an 8-digit BCD number) in general-purpose registers.
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H8/300L
REJ06B0161-0100Z/Rev
001C
F604
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R50003
Abstract: 001C 0A09
Text: APPLICATION NOTE H8/300L Super Low Power Series Division of 8-Digit BCD Numbers DIVD Introduction The software DIVD divides an 8-digit binary-coded decimal (BCD) number by another 8-digit BCD number and places the result (an 8-digit BCD number) in general-purpose registers.
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H8/300L
H8/38024
REJ06B0162-0200/Rev
R50003
001C
0A09
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001C
Abstract: 0A09 18BD H00000000
Text: APPLICATION NOTE H8/300L Series Division of 8-Digit BCD Numbers DIVD Introduction 1. The software DIVD divides an 8-digit binary-coded decimal (BCD) number by another 8-digit BCD number and places the result (an 8-digit BCD number) in general-purpose registers.
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H8/300L
REJ06B0162-0100Z/Rev
001C
0A09
18BD
H00000000
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BCD Rate Multiplier
Abstract: 001C
Text: APPLICATION NOTE H8/300L Super Low Power Series Multiplication of 4-Digit BCD Numbers MULD Introduction The software MULD multiplies a 4-digit binary-coded decimal (BCD) number by another 4- digit BCD number and places the result (an 8-digit BCD number) in general-purpose registers.
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H8/300L
H8/38024
REJ06B0161-0200/Rev
BCD Rate Multiplier
001C
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mc14553b
Abstract: Capacitor 47 VFK bcd counters Capacitor 10 VFK BCD counter MC14553BCP
Text: MC14553B 3−Digit BCD Counter The MC14553B 3−digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD
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MC14553B
PDIP-16
MC14553BCP
MC14543B
MC14553B
Capacitor 47 VFK
bcd counters
Capacitor 10 VFK
BCD counter
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Untitled
Abstract: No abstract text available
Text: MC14553B 3-Digit BCD Counter The MC14553B 3−digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD
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MC14553B
PDIP-16
MC14553B/D
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Capacitor 330 VFK
Abstract: mc14553b
Text: MC14553B 3-Digit BCD Counter The MC14553B 3−digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD
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MC14553B
PDIP-16
MC14553B/D
Capacitor 330 VFK
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18 pin 7 segment display ic 3digit
Abstract: 12 pin 7 segment quad digit display pin diagram MC14543B MC14553B MC14553BCP MC14553BDW
Text: MC14553B 3-Digit BCD Counter The MC14553B 3–digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD
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MC14553B
MC14553B
r14525
MC14553B/D
18 pin 7 segment display ic 3digit
12 pin 7 segment quad digit display pin diagram
MC14543B
MC14553BCP
MC14553BDW
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DM74145N
Abstract: DM54 DM54145J DM54145W DM74145 J16A N16E W16A
Text: DM74145 BCD to Decimal Decoders/Drivers General Description Features These BCD-to-decimal decoders/drivers consist of eight inverters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of BCD input logic
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DM74145
DM74145N
DM54
DM54145J
DM54145W
DM74145
J16A
N16E
W16A
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9s complement circuit
Abstract: No abstract text available
Text: DM8898/DM8899 TRI-STATE BCD to Binary/Binary to BCD Converters DM8898/DM8899 National Semiconductor Corporation General Description These circuits are the TRI-STATE versions of the popular BCD to binary and binary to BCD converters, DM74184 and DM74185A respectively. They are derived from the 256-bit
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DM8898/DM8899
DM8898/DM8899
DM74184
DM74185A
256-bit
DM8598.
TL/F/6593-5
9s complement circuit
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C14527B BCD R ate M ultiplier The MC14527B BCD rate multiplier DRM provides an output pulse rate based upon the BCD input number. For example, if 6 is the BCD input number, there will be six output pulses for every ten input pulses. This part
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C14527B
MC14527B
MC14527B/D
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Untitled
Abstract: No abstract text available
Text: Semiconductor February 1988 CD4028BM/CD4028BC BCD-to-Decimal Decoder General Description Features The CD4028BM/CD4028BC is a BCD-to-decimal or binaryto-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the 4
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CD4028BM/CD4028BC
1-of-10
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Untitled
Abstract: No abstract text available
Text: June 1989 Semiconductor & 54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect ed in pairs to make BCD input data available for decoding
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54LS42/DM54LS42/DM74LS42
4-line-to-16-line
54LS42)
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Untitled
Abstract: No abstract text available
Text: LS42 National Semiconductor 54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect ed in pairs to make BCD input data available for decoding
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54LS42/DM54LS42/DM74LS42
4-iine-to-16-line
54LS42)
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DM8598
Abstract: No abstract text available
Text: January 1987 DM8898/DM8899 TRI-STATE BCD to Binary/Binary to BCD Converters General Description These circuits are the TRI-STATE versions of the popular BCD to binary and binary to BCD converters, DM74184 and DM74185A respectively. They are derived from the 256-bit
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DM8898/DM8899
DM74184
DM74185A
256-bit
DM8598.
DM8598
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Untitled
Abstract: No abstract text available
Text: SEMICONDUCTOR t m DM74145 BCD to Decimal Decoders/Drivers General Description Features These BCD-to-decimal decoders/drivers consist of eight in verters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for de
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DM74145
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Untitled
Abstract: No abstract text available
Text: m National Semiconductor DM5445/DM7445 BCD to Decimal Decoders/Drivers General Description Features These BCD-to-decimal decoders/drivers consist of eight in verters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for
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DM5445/DM7445
TL/F/6517-2
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Untitled
Abstract: No abstract text available
Text: LS42 ZWÄNational éLm Semiconductor 54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect ed in pairs to make BCD input data available for decoding
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54LS42/DM54LS42/DM74LS42
4-line-to-16-line
54LS42)
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Untitled
Abstract: No abstract text available
Text: 42A National Semiconductor 5442A/DM5442A/DM7442A BCD to Decimal Decoders General Description Features These BCD-to-declmal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect ed in pairs to make BCD input data available for decoding
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442A/DM5442A/DM7442A
4-line-to-16-line
400ft
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Untitled
Abstract: No abstract text available
Text: National J jfl Semiconductor DM54145/DM74145 BCD to Decimal Decoders/Drivers General Description Features These BCD-to-decimal decoders/drivers consist of eight in verters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for
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DM54145/DM74145
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