EPM7160E
Abstract: EPM7128E EPM7032S EPM7128S EPM7160S
Text: Designing for In-System Programmability in MAX 7000S Devices June 1995, ver. 1 Introduction Application Brief 145 Altera’s MAX 7000S devices offer in-system programmability ISP , which allows devices to be programmed and reprogrammed while they are mounted on a printed circuit board (PCB). ISP minimizes the potential
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7000S
EPM7160E
EPM7128E
EPM7032S
EPM7128S
EPM7160S
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EPM9560RC208-15
Abstract: EPM9560ARI208-10 PINOUT epm9400rc208-15
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family November 2001, ver. 6.3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
EPM9320RC208-15C
EPM9320RC208-15F
EPM9320RC208-20C
EPM9320RI208-20C
EPM9320*
PDN0106
PDN0106
EPM9560RC208-15
EPM9560ARI208-10 PINOUT
epm9400rc208-15
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AF14
Abstract: EPM9320 EPM9560 280-Pin
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family February 1998, ver. 5.01 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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EPM9560 pinout
Abstract: No abstract text available
Text: MAX 9000 Programmable Logic Device Family June 1996, ver. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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12-ns
EPM9560 pinout
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epm9560rc240 pinout
Abstract: EPM9320RI20820 EPM9320GC28020 EPM9560WC208-20 altera epm9560rc208-15 EPM9560ARI240-10 epm9320ar
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family December 2002, ver. 6.4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
EPM9560RC208-15
PDN0106
epm9560rc240 pinout
EPM9320RI20820
EPM9320GC28020
EPM9560WC208-20
altera epm9560rc208-15
EPM9560ARI240-10
epm9320ar
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EPM9320
Abstract: EPM9560
Text: MAX 9000 Programmable Logic Device Family June 1996, ver. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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12-ns
EPM9320
EPM9560
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epm9320
Abstract: AF14 EPM9560
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family December 2002, ver. 6.4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
epm9320
AF14
EPM9560
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AF14
Abstract: EPM9320 EPM9560
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family October 2001, ver. 6.1 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
AF14
EPM9320
EPM9560
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EPM9320ARI208-10
Abstract: EPM9320GC28020 EPM9560ARI208-10 PINOUT epm9320lc84-20 EPM9560ARI240-10 EPM9480RC208-15
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family June 2003, ver. 6.5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
LC84-20
PDN0106
PDN0106
EPM9400RC208-15C
EPM9400RC208-20C
EPM9320ARI208-10
EPM9320GC28020
EPM9560ARI208-10 PINOUT
epm9320lc84-20
EPM9560ARI240-10
EPM9480RC208-15
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vhdl code for turbo
Abstract: No abstract text available
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family April 1998, ver. 5.03 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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AF14
Abstract: EPM9320 EPM9560
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family July 1999, ver. 6.01 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
AF14
EPM9320
EPM9560
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AF14
Abstract: EPM9320 EPM9560
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family November 2001, ver. 6.3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
AF14
EPM9320
EPM9560
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M9000
Abstract: AF14 EPM9320 EPM9560 programming hardware manufacturers EPM9320 Transition
Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family June 2003, ver. 6.5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX
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10-ns
M9000
AF14
EPM9320
EPM9560
programming hardware manufacturers
EPM9320 Transition
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Altera EP1800
Abstract: EP1800 Altera EP1810 EPI800
Text: CORP B4E EP1800 A L TE RA D • QSTS37E ÜGOIGÛ? T 48-MACROCELL EPLD & ~ û ■ 7 EPI800 FEATURES GENERAL DESCRIPTION • High density, User-Configurable LSI logic re placement for conventional and custom logic • Functional and pin compatible with the Altera
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QSTS37E
48-MACROCELL
EPI800
EP1810
250ns
100ns)
EP1800-2
EP1800-3
EP1800
Altera EP1800
Altera EP1810
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EPM5130
Abstract: D1398
Text: EPM 5130 EPLD High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture tPD as fast as 15 ns Counter frequencies up to 83.3 MHz
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128-macrocell,
32-bit
16-bit
100-pin
84-pin
STS372
D004247
EPM5130
D1398
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EPM5130
Abstract: 100-Pin Package Pin-Out Diagram D2-3401 EPM 5130
Text: EPM5130 EPLD □ □ Features □ □ □ □ □ □ □ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 m acrocells optim ized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture
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EPM5130
128-macrocell,
32-bit
16-bit
100-pin
84-pin
in100-Pin
ALTED001
100-Pin Package Pin-Out Diagram
D2-3401
EPM 5130
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EPM5130
Abstract: No abstract text available
Text: EPM5130 EPLD □ High-density 128-macrocell general-purpose MAX 5000 EPLD □ 128 macrocells optim ized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components □ High pin count for 16- or 32-bit data paths □ 256 shareable expander product terms
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EPM5130
128-macrocell
32-bit
16-bit
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EPM5130
Abstract: EPM5130A-15 74N10
Text: EPM5130 EPLD Features • ■ ■ ■ ■ ■ ■ ■ ■ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture
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EPM5130
128-macrocell,
32-bit
16-bit
100-pin
84-pin
EPM5130A-15
74N10
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PDF
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EPM5130
Abstract: LD128
Text: EPM5130 EPLD Features □ □ □ □ □ □ u □ High-density 128-macrocell general-purpose M A X 5000 E P L D 128 m acrocells optim ized for pin-intensive applications, easily integrating over 60 T T L M SI and SSI components H igh pin count for 16- or 32-bit data paths
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EPM5130
128-macrocell
32-bit
16-bit
LD128
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EPM5130
Abstract: EPM5130A-20 KSD 101-G EPM5130A-15 100-Pin Package Pin-Out Diagram 4536C
Text: EPM 5130 EPLD Features • ■ ■ ■ ■ ■ ■ ■ ■ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easilyintegrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture
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EPM5130
128-macrocell,
32-bit
16-bit
100-pin
84-pin
STS372
EPM5130A-20
KSD 101-G
EPM5130A-15
100-Pin Package Pin-Out Diagram
4536C
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Altera EPM5128
Abstract: WKX 62 EPM5016 epm5130 pinouts for 7400 series EPM5064 EPM5192 program EPM5032 EPM5128 PACKAGING PLDS-MAX
Text: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.
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EPM5016
EPM5192
20-pin
100-pin
15-ns
Altera EPM5128
WKX 62
epm5130
pinouts for 7400 series
EPM5064
program EPM5032
EPM5128 PACKAGING
PLDS-MAX
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EPM5192
Abstract: No abstract text available
Text: EPM5192 EPLD Features H • ■ ■ ■ Figure 20. EPM5192 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 8 and 9 in this data sheet fo r pin-out information. Windows in ceramic packages only. 0 D 3 z> D o û 5 2 2 § § § § § > iillo 0 § § § i° °
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EPM5192
84-pin
100-pin
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EPM5130
Abstract: No abstract text available
Text: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from
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EPM5016
EPM5192
20-pin
100-pin
15-ns
EPM5130
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EP1830
Abstract: EP1810 jedec 74HC EP1810 EP18302 EP1830 jedec
Text: EP1810 EPLDs High-Performance 48-Macrocell Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ □ Q General Description The EP1810 Erasable Programmable Logic Devices EPLDs offer LSI density,TTL-equivalentspeed, and low power consumption. Each EPLD can
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EP1810
48-Macrocell
EP1830-20,
EP1830-25,
EP1830-30
EP1830-25
EP1830
EP1810 jedec
74HC
EP18302
EP1830 jedec
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