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    M40Z300

    Abstract: M48Z128 M48Z128V M48Z128Y SOH28
    Text: M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES


    Original     		PDF M48Z128 M48Z128Y, M48Z128V* M48Z128: M48Z128Y: M48Z128V: M40Z300 M48Z128 M48Z128V M48Z128Y SOH28

    PMDIP32

    Abstract: No abstract text available
    Text: M48Z128 M48Z128Y CMOS 128K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with


    Original     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y: PMDIP32 M48Z128/128Y M48Z128Y AI01195 PMDIP32

    M48Z128

    Abstract: M48Z128Y SOH28 TSOP32
    Text: M48Z128 M48Z128Y 1 Mbit 128Kb x8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the ABSENCE of POWER ■ AUTOMATIC POWER-FAIL CHIP DESELECT


    Original     		PDF M48Z128 M48Z128Y 128Kb PMDIP32 M48Z128: M48Z128Y: 28-PIN 32-LEAD M48Z128 M48Z128Y SOH28 TSOP32

    Untitled

    Abstract: No abstract text available
    Text: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


    Original     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y: PMDIP32

    M48Z128

    Abstract: M48Z128V M48Z128Y SOH28 TSOP32
    Text: M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS OF DATA RETENTION IN THE


    Original     		PDF M48Z128 M48Z128Y, M48Z128V* 32-pin M48Z128: M48Z128Y: M48Z128V: M48Z128 M48Z128V M48Z128Y SOH28 TSOP32

    M48Z128

    Abstract: M48Z128Y
    Text: M48Z128 M48Z128Y 1 Mbit 128Kb x8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT


    Original     		PDF M48Z128 M48Z128Y 128Kb M48Z128: M48Z128Y: M48Z128/128Y M48Z128 M48Z128Y

    SOH28

    Abstract: TSOP32 M48Z128 M48Z128V M48Z128Y
    Text: M48Z128 M48Z128Y, M48Z128V 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS OF DATA RETENTION IN THE


    Original     		PDF M48Z128 M48Z128Y, M48Z128V M48Z128: M48Z128Y: M48Z128V: 28-PIN 32LEAD SOH28 TSOP32 M48Z128 M48Z128V M48Z128Y

    Untitled

    Abstract: No abstract text available
    Text: M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS OF DATA RETENTION IN THE


    Original     		PDF M48Z128 M48Z128Y, M48Z128V* 32-pin M48Z128: M48Z128Y: M48Z128V: 28-PIN 32-LEAD

    M40Z300

    Abstract: M48Z128 M48Z128V M48Z128Y D 4242 CP1621
    Text: M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES


    Original     		PDF M48Z128 M48Z128Y, M48Z128V* M48Z128: M48Z128Y: M48Z128V: M40Z300 M48Z128 M48Z128V M48Z128Y D 4242 CP1621

    M48Z128V

    Abstract: M48Z128Y SOH28 TSOP32 M48Z128 M68Z128
    Text: M48Z128 M48Z128Y, M48Z128V 1 Mbit 128Kb x8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the ABSENCE of POWER ■ AUTOMATIC POWER-FAIL CHIP DESELECT


    Original     		PDF M48Z128 M48Z128Y, M48Z128V 128Kb PMDIP32 M48Z128: M48Z128Y: M48Z128V: 28-PIN M48Z128V M48Z128Y SOH28 TSOP32 M48Z128 M68Z128

    Untitled

    Abstract: No abstract text available
    Text: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


    Original     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y:

    Untitled

    Abstract: No abstract text available
    Text: M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS OF DATA RETENTION IN THE


    Original     		PDF M48Z128 M48Z128Y, M48Z128V* M48Z128: M48Z128Y: M48Z128V: 28-PIN 32-LEADd

    M48Z128

    Abstract: M48Z128Y
    Text: M48Z128 M48Z128Y 1Mb 128K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT


    Original     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y: M48Z128/128Y M48Z128 M48Z128Y AI01195 120ns

    AI02169

    Abstract: M48Z128 M48Z128Y AI01196
    Text: M48Z128 M48Z128Y 1Mb 128K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION


    Original     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y: M48Z128/128Y AI02169 M48Z128 M48Z128Y AI01196

    M48Z128

    Abstract: M48Z128V M48Z128Y AN1012
    Text: M48Z128 M48Z128Y, M48Z128V 5.0 V or 3.3 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


    Original     		PDF M48Z128 M48Z128Y, M48Z128V M48Z128: M48Z128Y: M48Z128V: PMDIP32 M48Z128 M48Z128V M48Z128Y AN1012

    Untitled

    Abstract: No abstract text available
    Text: F Z J ^ 7 i SGS-THOMSON M48Z128 K» ô [iL[imMO(êS_ M48Z128Y 1 Mb (128K x 8) ZEROPOWER SRAM • INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the


    OCR Scan     		PDF M48Z128 M48Z128Y M48Z128: M48Z128Y: M48Z128/128Y

    Untitled

    Abstract: No abstract text available
    Text: / T T S G S -T H O M S O N M 48Z128 A 7 # . HD»[gHI gTITM m(gS_ M 48Z128Y 1Mb (128K x 8) ZEROPOWER SRAM • INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the


    OCR Scan     		PDF 48Z128 48Z128Y M48Z128Y: 128Kx M48Z128/128Y