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    AGERE ASI Search Results

    AGERE ASI Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    R9J06G039UGNP#BA0 Renesas Electronics Corporation Fully Compliant ASi-5 Transceiver ASSP Visit Renesas Electronics Corporation
    ASIPROGRKITUSB Renesas Electronics Corporation ASI Programmer Kit USB Visit Renesas Electronics Corporation
    7MP4130S20M Renesas Electronics Corporation 2MX32 CMOS SRAM MOD W/ASY Visit Renesas Electronics Corporation
    7MP4130S25M Renesas Electronics Corporation 2MX32 CMOS SRAM MOD W/ASY Visit Renesas Electronics Corporation
    10124522-001LF Amphenol Communications Solutions 10124522-001LF-DSUB F SCREWLOCK ASY 440 Visit Amphenol Communications Solutions

    AGERE ASI Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    tag 8833

    Abstract: RSP RELAY scr tag 89 marking RSP tag b1
    Text: Product Brief June 2001 PayloadPlus Agere System Interface Introduction Agere System Interface The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full


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    PDF PB01-131NP tag 8833 RSP RELAY scr tag 89 marking RSP tag b1

    tag 8833

    Abstract: RSP RELAY scr tag 89 marking RSP asi bus MASTER BUS asi
    Text: Preliminary Product Brief April 2000 NPASI PayloadPlus Agere System Interface Introduction Agere System Interface The Lucent PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full programmability.


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    PDF 2000Lucent tag 8833 RSP RELAY scr tag 89 marking RSP asi bus MASTER BUS asi

    Viterbi Trellis Decoder texas

    Abstract: AGERE DSP DSP1610 Simulator Agere non-linear detection ARM JTAG Programmer Schematics input id 54175 yd 4145 nec k 4145 Viterbi Trellis Decoder tag 8833
    Text: December 2001 DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual A Word About Trademarks . . . The following Agere Systems Inc. trademark is used in this manual: Tapdance The following trademarks, owned by entities other than Agere Systems Inc., are used in this manual:


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    PDF DSP1611/17/18/27/28/29 MC6800 Viterbi Trellis Decoder texas AGERE DSP DSP1610 Simulator Agere non-linear detection ARM JTAG Programmer Schematics input id 54175 yd 4145 nec k 4145 Viterbi Trellis Decoder tag 8833

    AGERE SYSTEMS

    Abstract: ic 7495 7495 ic 1-70000-A1 USS-344 USS-344 QuadraBus "USB" peripheral
    Text: Product Brief, Rev. 4 September 2000 Agere QuadraBus USB Card QuadraBus Card Description The add-in PCI card based on the Agere Systems Inc. USS-344 QuadraBus USB chip is a four host universal serial bus USB peripheral component interconnect (PCI) board. The card gives PC OEMs, VARs, and computer retailers a vehicle to increase their revenues. It can provide an economical way to overcome the bandwidth limitations encountered when consumers connect high-bandwidth devices such as PC video cameras


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    PDF USS-344 PB00-017CMPR-4 PB00-017CMPR-3) AGERE SYSTEMS ic 7495 7495 ic 1-70000-A1 USS-344 QuadraBus "USB" peripheral

    Agere ASI

    Abstract: Agere FPP
    Text: Product Brief April 2001 PayloadPlus Fast Pattern Processor Introduction Fast Pattern Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full


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    PDF PB01-132NP Agere ASI Agere FPP

    scheduling

    Abstract: Agere ASI POS-PHY utopia
    Text: Product Brief April 2001 PayloadPlus Routing Switch Processor Introduction The Routing Switch Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full


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    PDF progra316, PB01-133NP scheduling Agere ASI POS-PHY utopia

    Agere ASI

    Abstract: a bus system with two 7495 "routing tables"
    Text: Product Brief November 2001 PayloadPlus Fast Pattern Processor Introduction Fast Pattern Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full


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    PDF PB01-132NP Agere ASI a bus system with two 7495 "routing tables"

    BCM3351

    Abstract: BCM6352 BCM1101 BCM3352 L9500 L9500A MO-220
    Text: Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides


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    PDF L9500A L9500A DS01-303ALC DS01-081ALC) BCM3351 BCM6352 BCM1101 BCM3352 L9500 MO-220

    Untitled

    Abstract: No abstract text available
    Text: Advance Data Sheet March 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides


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    PDF L9500A BCM3352, BCM1100, DS01-081ALC

    IBM REV 2.8 manual motherboard

    Abstract: agere soc
    Text: Information Manual, Rev. 2 March 2002 USS-344 QuadraBus Information Manual Introduction Evaluation Kit Contents Thank you for evaluating the Agere Systems USS344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller. This kit contains everything you need


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    PDF USS-344 USS344 MN00-087CMPR-2 MN00-087CMPR-1) IBM REV 2.8 manual motherboard agere soc

    TADM04622

    Abstract: TDAT04622 TMXF28155 TSI-16 TSWC01622 TSWC03622 f2021
    Text: a'e re AdLib OCR Evaluation systems Preliminary Data Sheet May 2002 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description . Same functionality as TSWC01622 with reduced jitter specifications The Agere Systems TSWC03622 is designed for a


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    PDF TSWC03622 TSWC01622 DS02-239HS TADM04622 TDAT04622 TMXF28155 TSI-16 f2021

    IBM REV 2.8 manual motherboard

    Abstract: No abstract text available
    Text: Information Manual, Rev. 3 September 2002 USS-344 QuadraBus Information Manual Introduction Evaluation Kit Contents Thank you for evaluating the Agere Systems USS344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller. This kit contains everything you need


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    PDF USS-344 USS344 MN00-087CMPR-3 MN00-087CMPR-2) IBM REV 2.8 manual motherboard

    L9312

    Abstract: T7504 T8536 TR-57 ptc pspice RELAY CIRCUIT TR57
    Text: Data Sheet July 2001 L9312 Line Interface and Line Access Circuit Forward Battery SLIC and Ringing Relay for TR-57 Applications Introduction Description The Agere Systems Inc. L9312 is a combination fullfeature, ultralow-power SLIC, and solid-state ringing


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    PDF L9312 TR-57 TR-57 DS01-192ALC DS01-170ALC) T7504 T8536 ptc pspice RELAY CIRCUIT TR57

    Untitled

    Abstract: No abstract text available
    Text: Product Brief April 2005 Advanced PayloadPlus APP300 Access Network Processors Introduction The Agere Systems Advanced PayloadPlus APP300 network processor devices are the latest addition to the PayloadPlus family of products. These devices offer a comprehensive programmable solution with


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    PDF APP300 APP300 a8109-9138 PB05-039NP

    AGERE DSP

    Abstract: PB02-0 CSP1027 DSP1627 DSP1629 HF1627-RD phantom power serial port rs232 "Phantom power"
    Text: Product Brief January 2002 HF1627-RD Hands-Free DSP1627 Reference Design Features Description Software The HF1627-RD is a reference design and demonstration platform consisting of an Agere DSP1627 executing a high-quality automotive hands-free speakerphone application. The system functionality


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    PDF HF1627-RD DSP1627 HF1627-RD DSP1627 Full-dup610-712-4106) PB02-035AUTO PN00-015AUTO) AGERE DSP PB02-0 CSP1027 DSP1629 phantom power serial port rs232 "Phantom power"

    STATES10

    Abstract: No abstract text available
    Text: Data Sheet March 2001 L9312 Line Interface and Line Access Circuit Forward Battery SLIC and Ringing Relay for TR-57 Applications Introduction Description The Agere Systems Inc. L9312 is a combination fullfeature, ultralow-power SLIC, and solid-state ringing


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    PDF L9312 TR-57 DS01-170ALC DS00-427ALC) STATES10

    Internal diagram of ic 7495

    Abstract: TPCS480 epd driver ic EPD controller
    Text: Product Brief June 2001 TPCS480 High-Speed Switching Protocol Independent Scheduler PI-Sched Introduction The protocol independent scheduler (PI-Sched) is part of Agere Systems ’ high-speed switching family of devices. It provides a highly integrated, innovative,


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    PDF TPCS480 OC-48c PN00-035ATM Internal diagram of ic 7495 epd driver ic EPD controller

    BCM63

    Abstract: bcm3351 bcm6352 BCM 4505 BCM6 bcm 7444
    Text: Data Sheet January 2002 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides


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    PDF L9500A BCM3351, B-2448, DS02-110ALC DS01-303ALC) BCM63 bcm3351 bcm6352 BCM 4505 BCM6 bcm 7444

    16411A1

    Abstract: MARKING CODE ADEE ED9 marking diode Marking a4v DSP16000 marking code A6V DSP16410 DSP16411 TDO01 DSP16K
    Text: Advisory December 2002 DSP16411 SEMI Design Exception Overview Agere Systems’ DSP16411 is the next-generation digital signal processor based on the DSP16000 core architecture offering increased speed and on-chip memory. The system and external memory interface


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    PDF DSP16411 DSP16000 DSP16410B DSP16410CG DSP16411 16411A1 MARKING CODE ADEE ED9 marking diode Marking a4v marking code A6V DSP16410 TDO01 DSP16K

    Agere ASI

    Abstract: APP550 NP10 TM10 "L2TP"
    Text: Product Brief Brief Product September 2002 September 2002 Advanced PayloadPlus Network Processor APP550 Introduction The Agere Systems Advanced PayloadPlus Network Processor device is the latest addition to the PayloadPlus family of products. It offers a


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    PDF APP550) PB02-024NP-2 PB02-024NP-1) Agere ASI APP550 NP10 TM10 "L2TP"

    BCM3351

    Abstract: L9500 VKKD BCM1101 BCM3352 BCM6352 L9500B MO-220 sine wave generator using ic 555 BCM6
    Text: Preliminary Data Sheet February 2002 L9500B High-Voltage Ringing SLIC for VoIP Applications L9500B Introduction Applications The Agere Systems Inc. L9500B is a subscriber line interface circuit SLIC that is optimized for short-loop, powersensitive applications. This device provides the complete


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    PDF L9500B L9500B DS02-131ALC DS01-304ALC) BCM3351 L9500 VKKD BCM1101 BCM3352 BCM6352 MO-220 sine wave generator using ic 555 BCM6

    STSI-144

    Abstract: No abstract text available
    Text: Hardware Design Guide June 2004 STSI-144 Scalable Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. scalable time-slot interchanger STSI-144 device. Information relevant to the use of


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    PDF STSI-144 STSI-144) DS04-214SWCH DS03-126SWCH)

    APP550

    Abstract: APP540 APP520 stacked vlans "L2TP"
    Text: Product Brief Brief Product January 2003 January 2003 Advanced PayloadPlus APP540 and APP520 Packet-Optimized Network Processors Introduction The Agere Systems Advanced PayloadPlus APP540 and APP520 Network Processor devices are the latest addition to the PayloadPlus family of


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    PDF APP540 APP520 APP520 APP540/520 PB-03-048NP APP550 stacked vlans "L2TP"

    APP550

    Abstract: MPLS ipsec POS-PHY APP530 APP750 "L2TP"
    Text: Product Brief Brief Product May 2003 May 2003 Edge/Access and Multiservice Network Processors: APP550 and APP530 Introduction System Overview Agere Systems is extending its market and technology leadership with the next generation of highly integrated network processors, the APP550


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    PDF APP550 APP530 APP550 APP530. APP530 PB03-139NP-1--replaces PB03-139NP MPLS ipsec POS-PHY APP750 "L2TP"