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    C5251

    Abstract: IDT70914 IDT70914S
    Text: HIGH-SPEED 4K x 9 SYNCHRONOUS DUAL-PORT STATIC RAM PRELIMINARY IDT70914S Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed clock-to-data output times — Military: 20/25ns max. — Commercial: 15/20/25ns (max.) • Low-power operation


    Original     		PDF IDT70914S 20/25ns 15/20/25ns 50MHz MIL-STD-883, 68-pin J68-1) C5251 IDT70914 IDT70914S

    IDT70914

    Abstract: IDT70914S
    Text: HIGH-SPEED 36K 4K x 9-BIT SYNCHRONOUS DUAL-PORT RAM PRELIMINARY IDT70914S Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed clock-to-data output times — Military: 20/25ns (max.) — Commercial: 15/20/25ns (max.) • Low-power operation


    Original     		PDF IDT70914S 20/25ns 15/20/25ns 50MHz IDT70914S MIL-STD-883, 68-pin J68-1) IDT70914

    J681

    Abstract: e 3007 IDT7099S
    Text: HIGH-SPEED 36K 4K x 9-BIT SYNCHRONOUS DUAL-PORT RAM IDT7099S Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed clock-to-data output times — Military: 20/25/30ns (max.) — Commercial: 15/20/25ns (max.) • Low-power operation — IDT7099S


    Original     		PDF IDT7099S 20/25/30ns 15/20/25ns 50MHz IDT7099S MIL-STD-883, 68-pin J68-1) J681 e 3007

    IDT7099S

    Abstract: l3007 STI-3007 A
    Text: HIGH-SPEED 4K x 9 SYNCHRONOUS DUAL-PORT RAM IDT7099S Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed clock-to-data output times — Military: 20/25/30ns max. — Commercial: 15/20/25ns (max.) • Low-power operation — IDT7099S


    Original     		PDF IDT7099S 20/25/30ns 15/20/25ns 50MHz MIL-STD-883, 68-pin J68-1) IDT7099S l3007 STI-3007 A

    e 3007

    Abstract: IDT7099S
    Text: HIGH-SPEED 36K 4K x 9-BIT SYNCHRONOUS DUAL-PORT RAM IDT7099S Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed clock-to-data output times — Military: 20/25/30ns (max.) — Commercial: 15/20/25ns (max.) • Low-power operation


    Original     		PDF IDT7099S 20/25/30ns 15/20/25ns IDT7099S MIL-STD-883, 68-pin J68-1) G68-1) e 3007

    IDT70914

    Abstract: IDT70914S pn80 70914S25 70914S
    Text: HIGH-SPEED 36K 4K x 9 SYNCHRONOUS DUAL-PORT RAM PRELIMINARY IDT70914S Integrated Device Technology, Inc. FEATURES: • High-speed clock-to-data output times — Military: 20/25ns (max.) — Commercial: 12/15/20ns (max.) • Low-power operation — IDT70914S


    Original     		PDF IDT70914S 20/25ns 12/15/20ns 58MHz MIL-STD-883, 68-pin J68-1) G68-1) IDT70914 IDT70914S pn80 70914S25 70914S

    70914S

    Abstract: IDT70914 IDT70914S
    Text: HIGH-SPEED 36K 4K x 9 SYNCHRONOUS DUAL-PORT RAM PRELIMINARY IDT70914S Integrated Device Technology, Inc. FEATURES: • High-speed clock-to-data output times — Military: 20/25ns (max.) — Commercial: 12/15/20ns (max.) • Low-power operation — IDT70914S


    Original     		PDF IDT70914S 20/25ns 12/15/20ns 58MHz MIL-STD-883, 68-pin J68-1) G68-1) 70914S IDT70914 IDT70914S

    J681

    Abstract: 70914S marking code diode a4l IDT70914 IDT70914S IDT70914J J68-1
    Text: HIGH SPEED 36K 4K X 9 SYNCHRONOUS DUAL-PORT RAM IDT70914S Features ◆ ◆ ◆ ◆ High-speed clock-to-data output times – Military: 20/25ns (max.) – Commercial: 12/15/20ns (max.) Low-power operation – IDT70914S Active: 850 mW (typ.) Standby: 50 mW (typ.)


    Original     		PDF IDT70914S 20/25ns 12/15/20ns 58MHz 68-pin J681 70914S marking code diode a4l IDT70914 IDT70914S IDT70914J J68-1

    CY7C130

    Abstract: CY7C131 CY7C140 CY7C141 IDT7130 IDT7140 C1303 C1307
    Text: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 DualĆPort Static RAM D Features D D D D speed/power Functional Description Automatic powerĆdown The CY7C130/CY7C131/CY7C140 and CY7C141 are highĆspeed CMOS 1K by 8 dualĆport static RAMs. Two ports are proĆ vided permitting independent access to


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 IDT7130 IDT7140 CY7C130/CY7C131/CY7C140 CY7C141 CY7C130/ CY7C131 CY7C140/CY7C141 16bit CY7C130 CY7C140 IDT7140 C1303 C1307

    CY7C132

    Abstract: CY7C136 CY7C146 C1328
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 DualĆPort Static RAM output enable OE . BUSY flags are proĆ vided on each port. In addition, an interĆ rupt flag (INT) is provided on each port of the 52Ćpin LCC and PLCC versions. BUSY signals that the port is trying to access the


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 52pin CY7C132/ CY7C136; CY7C132 CY7C136 CY7C146 C1328

    IDT70914

    Abstract: IDT70914S 0914s
    Text: HIGH SPEED 36K 4K X 9 SYNCHRONOUS DUAL-PORT RAM IDT70914S Features ◆ ◆ ◆ ◆ High-speed clock-to-data output times – Military: 20/25ns (max.) – Commercial: 12/15/20ns (max.) Low-power operation – IDT70914S Active: 850 mW (typ.) Standby: 50 mW (typ.)


    Original     		PDF IDT70914S 20/25ns 12/15/20ns 58MHz IDT70914 IDT70914S 0914s

    C13220

    Abstract: C1328 C1327 CY7C132 CY7C136 CY7C146 C1323 CY7C136-55NC
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 DualĆPort Static RAM output enable OE . BUSY flags are proĆ vided on each port. In addition, an interĆ rupt flag (INT) is provided on each port of the 52Ćpin LCC and PLCC versions. BUSY signals that the port is trying to access the


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 52pin CY7C132/ CY7C136; C13220 C1328 C1327 CY7C132 CY7C136 CY7C146 C1323 CY7C136-55NC

    CY7C131

    Abstract: CY7C130 CY7C140 CY7C141 IDT7130 IDT7140 C1303 C1307
    Text: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 DualĆPort Static RAM D Features D D D D speed/power Functional Description Automatic powerĆdown The CY7C130/CY7C131/CY7C140 and CY7C141 are highĆspeed CMOS 1K by 8 dualĆport static RAMs. Two ports are proĆ vided permitting independent access to


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 IDT7130 IDT7140 CY7C130/CY7C131/CY7C140 CY7C141 CY7C130/ CY7C131 CY7C140/CY7C141 16bit CY7C130 CY7C140 IDT7140 C1303 C1307

    Untitled

    Abstract: No abstract text available
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142)

    CY7C136-55NI

    Abstract: CY7C146 idt7132 CY7C132 CY7C136 PC TO IDT7132 CY7C136-55NC
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142) CY7C136-55NI CY7C146 idt7132 CY7C132 CY7C136 PC TO IDT7132 CY7C136-55NC

    j6916

    Abstract: idt7132 CY7C132 CY7C136 CY7C146 C1328 C1329
    Text: Y7C136 CY7C132/CY7C136 CY7C142/CY7C146 2Kx8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF Y7C136 CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin j6916 idt7132 CY7C132 CY7C136 CY7C146 C1328 C1329

    C1303

    Abstract: CY7C131 CY7C130 CY7C140 CY7C141
    Text: 40 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 65-micron CY7C130/CY7C131 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin C1303 CY7C131 CY7C130 CY7C140 CY7C141

    Untitled

    Abstract: No abstract text available
    Text: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 65-micron CY7C130/CY7C131 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin

    CY7C132-55PI

    Abstract: CY7C136-55NC 128959
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136; 52-pin 48-pin CY7C132/142) CY7C132-55PI CY7C136-55NC 128959

    7C130

    Abstract: 7c131 CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-55JXC CY7C131-55NXC MIL-STD-183 Z1014
    Text: CY7C130, CY7C130A CY7C131, CY7C131A 1K x 8 Dual-Port Static RAM Features Functional Description The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141 are high speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in


    Original     		PDF CY7C130, CY7C130A CY7C131, CY7C131A CY7C130/130A/CY7C131/131A/CY7C140 CY7C141 CY7C130/130A/ CY7C131/131A CY7C140/CY7C141 16-bit 7C130 7c131 CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-55JXC CY7C131-55NXC MIL-STD-183 Z1014

    CY7C130

    Abstract: CY7C131 CY7C140 CY7C141
    Text: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 65-micron CY7C130/CY7C131 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin CY7C130 CY7C131 CY7C140 CY7C141

    C1307

    Abstract: cY7c131 I CY7C130 CY7C131 CY7C140 CY7C141 C130-15 C1303 C13017
    Text: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 65-micron CY7C130/CY7C131 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin C1307 cY7c131 I CY7C130 CY7C131 CY7C140 CY7C141 C130-15 C1303 C13017

    j6916

    Abstract: 7C13 CY7C132 CY7C136 CY7C146 C13220 CY7C136-55NC Master Selection Guide
    Text: fax id: 5201 1CY 7C13 2/ CY7C1 36 CY7C132/CY7C136 CY7C142/CY7C146 2Kx8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142) j6916 7C13 CY7C132 CY7C136 CY7C146 C13220 CY7C136-55NC Master Selection Guide

    C1303

    Abstract: CY7C130 CY7C131 CY7C140 CY7C141 7c130 CY7C131-35JC C1307
    Text: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF CY7C130/CY7C131 CY7C140/CY7C141 65-micron CY7C130/CY7C131 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin C1303 CY7C130 CY7C131 CY7C140 CY7C141 7c130 CY7C131-35JC C1307