Untitled
Abstract: No abstract text available
Text: TP2435 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling
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TP2435
DSFP-TP2435
A022309
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TN2435
Abstract: No abstract text available
Text: TN2435 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TN2435
DSFP-TN2435
A022309
TN2435
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Untitled
Abstract: No abstract text available
Text: TN2130 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain
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TN2130
DSFP-TN2130
A022309
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SOT-23 IP
Abstract: TP2104 Diode SOT-23 marking 3V
Text: TP2104 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2104
DSFP-TP2104
A022309
SOT-23 IP
TP2104
Diode SOT-23 marking 3V
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TP0620
Abstract: sitp
Text: TP0620 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TP0620
DSFP-TP0620
A022309
TP0620
sitp
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SOT-23 IP
Abstract: TN2130K1-G 125OC TN2130 mos n-channel SOT-23
Text: TN2130 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TN2130
DSFP-TN2130
A022309
SOT-23 IP
TN2130K1-G
125OC
TN2130
mos n-channel SOT-23
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SITP
Abstract: Tp0606 TP0606N3-G
Text: TP0606 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TP0606
DSFP-TP0606
A022309
SITP
Tp0606
TP0606N3-G
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SITP
Abstract: TP0604 TP0604N3 SOW MARKING
Text: TP0604 P-Channel Enhancement-Mode Vertical DMOS FET Features ► ► ► ► ► ► ► General Description Low threshold -2.4V max. High input impedance Low input capacitance (95pF typical) Fast switching speeds Low on-resistance Free from secondary breakdown
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TP0604
DSFP-TP0604
A022309
SITP
TP0604
TP0604N3
SOW MARKING
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tp5lw
Abstract: TP2502 TP2502ND
Text: TP2502 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s wellproven silicon-gate manufacturing process. This combination
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TP2502
125pF
DSFP-TP2502
A022309
tp5lw
TP2502
TP2502ND
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Untitled
Abstract: No abstract text available
Text: TN0606 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Low threshold - 2.0V max. High input impedance Low input capacitance - 100pF typical Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage
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TN0606
100pF
DSFP-TN0606
A022309
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TP2435
Abstract: No abstract text available
Text: TP2435 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2435
DSFP-TP2435
A022309
TP2435
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tp5d
Abstract: tp2540n8-g SITP TP2540 TP2540ND
Text: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2540
125pF
DSFP-TP2540
A022309
tp5d
tp2540n8-g
SITP
TP2540
TP2540ND
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TN0604WG-G
Abstract: 75E1 TN0604 TN0604N3-G
Text: TN0604 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TN0604
140pF
DSFP-TN0604
A022309
TN0604WG-G
75E1
TN0604
TN0604N3-G
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SIVN0300L
Abstract: 0300l VN0300 0300L to92
Text: VN0300 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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VN0300
DSFP-VN0300
A022309
SIVN0300L
0300l
VN0300
0300L to92
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Untitled
Abstract: No abstract text available
Text: VN0300 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities
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VN0300
DSFP-VN0300
A022309
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Untitled
Abstract: No abstract text available
Text: TN2535 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Low threshold High input impedance Low input capacitance 125pF max. Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage This low threshold, enhancement-mode (normally-off)
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TN2535
125pF
DSFP-TN2535
A022309
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Untitled
Abstract: No abstract text available
Text: TN2510 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TN2510
125pF
DSFP-TN2510
A022309
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Untitled
Abstract: No abstract text available
Text: TP0620 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TP0620
DSPD-TO92TapingSpec
B070610
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TP2424
Abstract: No abstract text available
Text: TP2424 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2424
DSFP-TP2424
A022309
TP2424
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Untitled
Abstract: No abstract text available
Text: TD9944 Dual N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TD9944
125pF
DSFP-TD9944
A022309
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Untitled
Abstract: No abstract text available
Text: VN0808 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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VN0808
DSFP-VN0808
A022309
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Untitled
Abstract: No abstract text available
Text: TP5335 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description The Supertex TP5335 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device
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TP5335
TP5335
DSFP-TP5335
A022309
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Untitled
Abstract: No abstract text available
Text: TP2424 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling
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TP2424
DSFP-TP2424
A022309
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Untitled
Abstract: No abstract text available
Text: TP2104 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling
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TP2104
DSFP-TP2104
A022309
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