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    XCV400E Search Results

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    Rochester Electronics LLC XCV400E-7BG432C0773

    FPGA, 2400 CLBS, 468252 GATES, 2
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    AMD XCV400E-7FG676C

    IC FPGA 404 I/O 676FCBGA
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    IC FPGA 404 I/O 676FCBGA
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    AMD XCV400E-7BG432I

    IC FPGA 316 I/O 432MBGA
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    AMD XCV400E-7BG560I

    IC FPGA 404 I/O 560MBGA
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    XCV400E Datasheets (102)

    Part ECAD Model Manufacturer Description Curated Type PDF
    XCV400E Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Original PDF
    XCV400E-6BG240C Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Original PDF
    XCV400E-6BG240I Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Original PDF
    XCV400E-6BG432C Xilinx 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BG432C Xilinx Virtex-E 1.8V field programmable gate array. Original PDF
    XCV400E-6BG432C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 316 I/O 432MBGA Original PDF
    XCV400E-6BG432I Xilinx 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BG432I Xilinx Virtex-E 1.8V field programmable gate array. Original PDF
    XCV400E-6BG560C Xilinx 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BG560C Xilinx Virtex-E 1.8V field programmable gate array. Original PDF
    XCV400E-6BG560C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 560MBGA Original PDF
    XCV400E-6BG560I Xilinx 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BG560I Xilinx Virtex-E 1.8V field programmable gate array. Original PDF
    XCV400E-6BG560I Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 560MBGA Original PDF
    XCV400E-6BGG432C Xilinx XCV400E-6BGG432C - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BGG432I Xilinx XCV400E-6BGG432I - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BGG560C Xilinx XCV400E-6BGG560C - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6BGG560I Xilinx XCV400E-6BGG560I - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV400E-6FG240C Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Original PDF
    XCV400E-6FG240I Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Original PDF

    XCV400E Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LVDSEXT-25

    Abstract: BLVDS-25 LVDSEXT25 bga 896 BGA 31 x 31 mm XC2V80 XC2V8000 XC2V40 XC2V250 XC2V500
    Text: XILINX VIRTEX FPGAs http://www.xilinx.com/products/platform/ Pins Body Size I/O’s 204 348 396 564 852 88 120 200 264 432 528 624 720 912 1104 1296 XCV812E XCV405E XCV3200E XCV2600E XCV2000E V-EM 1.8V XCV1600E XCV1000E XCV600E XCV400E XCV300E XCV200E XCV100E


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    PDF XC2V250 XC2V500 XC2VP20 XC2VP50 XC2V40 XC2V80 XC2V1000 XC2V1500 XC2V2000 XC2V3000 LVDSEXT-25 BLVDS-25 LVDSEXT25 bga 896 BGA 31 x 31 mm XC2V8000

    SPARTAN-3 XC3S400

    Abstract: CZ80CPU Z84C00
    Text: CZ80CPU 8-Bit Microprocessor Core The CZ80CPU implements a fast, fully-functional, single-chip, 8-bit microprocessor with the same instruction set as the Z80. The core has a 16-bit address bus capable of directly accessing 64kB of memory space. It has 252 root instructions with the reserved 4 bytes as prefixes, and accesses


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    PDF CZ80CPU CZ80CPU 16-bit CZ80CHIP, SPARTAN-3 XC3S400 Z84C00

    DPRAM

    Abstract: XCV600E IMA-32 XC4085XLA
    Text: IMA-32 Inverse Multiplexer for ATM November 15, 1999 Product Specification AllianceCORE Facts Core Specifics 4000XLA 4085XLA09BG352C CLBs/CLB Slices 3136 Clock IOBs 3 IOBs 258 Performance MHz 50 Xilinx Tools M1.5i or later Special Features SelectRAM Supported Family


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    PDF IMA-32 4000XLA 4085XLA09BG352C 4000XLA DPRAM XCV600E XC4085XLA

    qfn 3x3 tray dimension

    Abstract: XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga
    Text: Device Package User Guide [Guide Subtitle] [optional] UG112 v3.5 November 6, 2009 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the


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    PDF UG112 UG072, UG075, XAPP427, qfn 3x3 tray dimension XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga

    XCV200E Device, FG456 Package

    Abstract: XCV300BG432 BG432 PCI33 XCV200 XCV300 XCV400 XCV400E p146 AE-29
    Text: Application Note - Virtex-E Virtex-E Package Compatibility Guide This package compatibility guide describes the Virtex-E pin-outs and establishes guidelines for package compatibility between Virtex and Virtex-E devices. by Robert Le, Sr. Applications Engineer,


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    PDF XCV200E FG456 XCV200 XCV300E BG432 XCV200E Device, FG456 Package XCV300BG432 PCI33 XCV300 XCV400 XCV400E p146 AE-29

    SRL16E

    Abstract: SRL16 XIP2004 XIP2005 XIP2006 XIP2007 XIP2008 SRL16Es binaryencoded Ternary CAM
    Text: Content-Addressable Memory V3.0 March 14, 2002 Product Specification DIN[n:0] WR_ADDR[m:0] DATA_MASK[n:0] Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: logicore@xilinx.com URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com


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    PDF XIP2004 SRL16E SRL16 XIP2004 XIP2005 XIP2006 XIP2007 XIP2008 SRL16Es binaryencoded Ternary CAM

    cpld 95108

    Abstract: XCV200-6PQ240C XCV1000E-6HQ240C XCV800-6HQ240C XCV100E-6PQ240C XCV200E-6PQ240C XCV300E-6PQ240C XCV400E-6HQ240C XCV50-6PQ240C XCV50E-6PQ240C
    Text: GVA-270 Virtex -E DSP Hardware Accelerator Revision A April 3, 2000 GV & Associates, Inc. 23540 Oriente Way Ramona, CA 92065 USA Phone: +1 760-789-7015 Fax: +1 760-789-7015 E-mail: loop@gvassociates.com Web: www.gvassociates.com Features • • • •


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    PDF GVA-270 40-bit 65MHz 12-Bit AD6640) AD9762) XCV1000E6HQ240C 120MSPS cpld 95108 XCV200-6PQ240C XCV1000E-6HQ240C XCV800-6HQ240C XCV100E-6PQ240C XCV200E-6PQ240C XCV300E-6PQ240C XCV400E-6HQ240C XCV50-6PQ240C XCV50E-6PQ240C

    sis 968

    Abstract: vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.3 November 9, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).


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    PDF DS022-2 XCV2600E XCV3200E DS022-1, DS022-2, DS022-3, DS022-4, sis 968 vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog

    diode T25-4

    Abstract: IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.2 November 9, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


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    PDF DS022-1 32/64-bit, 66-MHz FG1156 XCV3200E DS022-1, DS022-2, DS022-4 DS022-3, diode T25-4 IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C

    LM3874-Adj

    Abstract: N CHANNEL MOSFET 10A 1000V CoolRunner-II CPLD LM2727 LM2737 LM2742 LM2743 LM2744 LM2745 LM2746
    Text: 適用於 Xilinx FPGA 的模擬技術設計指南 Power Expert . . 2 適用於 FPGA 的電源 管理解決方案 . . 3-19 適用於 FPGA 的高速 接口解決方案 . . 20-21 適用於 FPGA 及 CPLD 的 JTAG 測試方案 . 22-23


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    PDF OT-223 OT-23 O-220 O-263 LM3874-Adj N CHANNEL MOSFET 10A 1000V CoolRunner-II CPLD LM2727 LM2737 LM2742 LM2743 LM2744 LM2745 LM2746

    Field Programmable Gate Arrays

    Abstract: DS022-1 XCV1000E XCV100E MB 300E FPGA Virtex 6 pin configuration XCV1600E XCV2000E XCV200E XCV300E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


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    PDF DS022-1 32/64-bit, 66-MHz DS022-1, DS022-2, DS022-3, DS022-4, Field Programmable Gate Arrays DS022-1 XCV1000E XCV100E MB 300E FPGA Virtex 6 pin configuration XCV1600E XCV2000E XCV200E XCV300E

    XAPP137

    Abstract: FPGA Virtex 6 pin configuration XAPP138 CF75h XAPP132 XAPP139 XC4000 XC4000X XC4000XLA XCV50
    Text: Application Note: Virtex Series Virtex FPGA Series Configuration and Readback R XAPP138 v2.5 November 5, 2001 Summary This application note is offered as complementary text to the configuration section of the Virtex data sheet. It is strongly recommended that the Virtex data sheets be reviewed prior to


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    PDF XAPP138 XCV1000 XAPP137 FPGA Virtex 6 pin configuration XAPP138 CF75h XAPP132 XAPP139 XC4000 XC4000X XC4000XLA XCV50

    XCV100

    Abstract: XCV100E XCV150 XCV200 XCV300 XCV400 XCV50 XCV50E VHDL87 VHDL-93
    Text: Single Port Block Memory V1.0 May 28, 1999 Product Specification R ADDR[m : 0] DI[n : 0] Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 URL: www.xilinx.com/support/techsup/appinfo www.xilinx.com/ipcenter WE DO[n : 0]


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    PDF x9021 XCV100 XCV100E XCV150 XCV200 XCV300 XCV400 XCV50 XCV50E VHDL87 VHDL-93

    LM3874-Adj

    Abstract: LM3671 operational amplifier discrete schematic SCANSTA111 LP2985 LM2671 lm3485 LP3874-ADJ LM3874 SPARTAN-3 XC3S400
    Text: Analog Design Guide for Xilinx FPGAs Power Expert . 2 Power Management Solution for FPGAs . 3-19 High-Speed Interface Solution for FPGAs . 20-21 JTAG for FPGAs . 22-23 High-speed ADCs for FPGAs . 24-25


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    PDF O-220 O-263 OT-23 LM3874-Adj LM3671 operational amplifier discrete schematic SCANSTA111 LP2985 LM2671 lm3485 LP3874-ADJ LM3874 SPARTAN-3 XC3S400

    PC44

    Abstract: SO20 VQ44 XC17V00 XC18V00 XC2VP20 XC2VP30 XC2VP40
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v5.0 April 5, 2004 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


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    PDF XC18V00 DS026 XC18V04 XC18V02, XC18V01 XC18V512, PC44 SO20 VQ44 XC17V00 XC2VP20 XC2VP30 XC2VP40

    FPGA Virtex 6

    Abstract: aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200
    Text: Application Note: Virtex-E Families R Virtex Package Compatibility Guide XAPP235 v1.3 June 20, 2000 Summary This package compatibility guide describes the pinouts and established guidelines for package compatibility between the Virtex family and the Virtex-E and Virtex-E Extended Memory


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    PDF XAPP235 FG900 XCV1000E XCV812E XCV1000E L264N L264P L279N L279P FPGA Virtex 6 aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200

    SO-G8

    Abstract: 17128E xc1736e xilinx 8 pin dip HW-130 SO20 XC1700 XC1700E XC1701 Xilinx 17128
    Text: Product Obsolete or Under Obsolescence < B L R DS027 v3.5 June 25, 2008 XC1700E, XC1700EL, and XC1700L Series Configuration PROMs Product Specification 8 Features • One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx


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    PDF DS027 XC1700E, XC1700EL, XC1700L XC1700E XC1700L 20-pin 44pin 44-pin SO-G8 17128E xc1736e xilinx 8 pin dip HW-130 SO20 XC1700 XC1701 Xilinx 17128

    GSR 10,8

    Abstract: DLL5 BG432 ic 404 BB112 equivalent
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.0 April 2, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 Kb to 4 Mb system gates - 130 MHz internal performance (four LUT levels)


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    PDF DS022-1 32/64-bit, 66-MHz DS022-1, DS022-3, DS022-2, DS022-4, DS022-4 GSR 10,8 DLL5 BG432 ic 404 BB112 equivalent

    XC2S150pq208

    Abstract: xc2s50-pq208 XCV1000EFG680-6C XC2S150PQ208-5C XC2S200ePQ208 XC2S300EPQ208-6C xcv1000efg680 XCV300BG432 2S50E-PQ208-6C XC3S1000-FG456-4C
    Text: LogiCORE PCI32 Interface v3.0 DS206 October 28, 2003 Introduction Data Sheet, v3.0.116 LogiCORE Facts With the Xilinx LogiCORE PCI Interface, a designer can build a customized, fully PCI 2.3-compliant core with the highest possible sustained performance, 528 Mbytes/sec.


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    PDF PCI32 DS206 32-bit, 32-bit 64/32-bit PC32/33 XC2S150pq208 xc2s50-pq208 XCV1000EFG680-6C XC2S150PQ208-5C XC2S200ePQ208 XC2S300EPQ208-6C xcv1000efg680 XCV300BG432 2S50E-PQ208-6C XC3S1000-FG456-4C

    XCF04S

    Abstract: xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb
    Text: 47 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.13.1 April 3, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


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    PDF DS123 XCF04S xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb

    xcf16pfs

    Abstract: Xilinx XCF04S XCF01S XC2V80 DS026
    Text: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.3 May 7, 2004 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS FLASH Process • Endurance of 20,000 Program/Erase Cycles


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    PDF DS123 xcf16pfs Xilinx XCF04S XCF01S XC2V80 DS026

    XC3S250E design guide

    Abstract: csb 485 E2
    Text: <BL Blue> R DS123 v2.11 February 1, 2007 Platform Flash In-System Programmable Configuration PROMs Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process


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    PDF DS123 LVCMOS25 XC3S250E design guide csb 485 E2

    XCV100E

    Abstract: XCV200E XCV1600E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.9 September 10, 2002 Production Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,


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    PDF DS022-3 DS022-1, DS022-3, DS022-2, DS022-4, XCV100E XCV200E XCV1600E

    xc18v02 Date Marking

    Abstract: XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C XC18V00
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v3.10 April 17, 2003 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


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    PDF XC18V00 DS026 XC2S400E XC2S600E xc18v02 Date Marking XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C