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    SN74LV166ADR Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Visit Texas Instruments Buy
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    Texas Instruments SN74LV166ADR

    IC SHIFT REGISTER 8-BIT 16-SOIC
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    Rochester Electronics LLC SN74LV166ADR

    SN74LV166A 8-BIT PARALLEL-LOAD S
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    SN74LV166ADR Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Type PDF
    SN74LV166ADR Texas Instruments SN74LV166 - 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF
    SN74LV166ADR Texas Instruments 8 Bit Parallel-Load Shift Register Original PDF
    SN74LV166ADR Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF
    SN74LV166ADR Texas Instruments Original PDF
    SN74LV166ADRE4 Texas Instruments SN74LV166 - 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF
    SN74LV166ADRE4 Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF
    SN74LV166ADRE4 Texas Instruments 8-Bit Parallel-Load Shift Registers Original PDF
    SN74LV166ADRG4 Texas Instruments SN74LV166 - 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF
    SN74LV166ADRG4 Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Original PDF

    SN74LV166ADR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A 74lv166
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A 74lv166

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN74LV166A

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) LV166A SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A

    74ls74apc

    Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
    Text: Standard Linear and Logic Products Cross-Reference Introduction Notice This Standard Linear and Logic Products CrossReference will assist in finding a device made by Texas Instruments that is a drop-in or similar replacement to many of our competitors’ standard linear and logic products.


    Original     		PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456A – FEBRUARY 2001 – REVISED JULY 2003 D D D D D D D D D 2-V to 5.5-V VCC Operation Max tpd of 10.5 ns at 5 V Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV166A, SN74LV166A SCLS456A 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) LV166A SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) SN54LV166A SN74LV166A SN74LV166ANSR

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    SN74LV166A

    Abstract: A115-A C101 SN54LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A SN74LV166A A115-A C101 SN54LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)