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    74LV166 Search Results

    74LV166 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LV166AFPEL-E Renesas Electronics Corporation HD74LV-A Series, , / Visit Renesas Electronics Corporation
    74LV166ATELL-E Renesas Electronics Corporation HD74LV-A Series, , / Visit Renesas Electronics Corporation
    SN74LV166APWRG4 Texas Instruments 8-Bit Parallel-Load Shift Registers 16-TSSOP -40 to 85 Visit Texas Instruments Buy
    SN74LV166AD Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Visit Texas Instruments
    SN74LV166ADR Texas Instruments 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 Visit Texas Instruments Buy
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    74LV166 Price and Stock

    Rochester Electronics LLC SN74LV166ANSR

    SN74LV166A 8-BIT PARALLEL-LOAD S
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    DigiKey SN74LV166ANSR Bulk 20,000 417
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    Texas Instruments SN74LV166APWR

    IC SHIFT REGISTER 8-BIT 16-TSSOP
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    DigiKey SN74LV166APWR Cut Tape 16,136 1
    • 1 $1.06
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    SN74LV166APWR Digi-Reel 16,136 1
    • 1 $1.06
    • 10 $0.767
    • 100 $0.6114
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    SN74LV166APWR Reel 14,000 2,000
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    Mouser Electronics SN74LV166APWR 4,084
    • 1 $1.01
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    Bristol Electronics SN74LV166APWR 500 5
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    Chip1Stop SN74LV166APWR Cut Tape 1,836
    • 1 $0.726
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    Rochester Electronics LLC SN74LV166APW

    SN74LV166A 8-BIT PARALLEL-LOAD S
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    DigiKey SN74LV166APW Bulk 10,483 484
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    Rochester Electronics LLC SN74LV166ANS

    IC REGISTR PAR-LOAD 8BIT 16SO
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    DigiKey SN74LV166ANS Bulk 9,751 634
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    Rochester Electronics LLC SN74LV166AD

    SN74LV166A 8-BIT PARALLEL-LOAD S
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    DigiKey SN74LV166AD Bulk 6,046 431
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    74LV166 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A 74lv166
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A 74lv166

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) LV166A SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456A – FEBRUARY 2001 – REVISED JULY 2003 D D D D D D D D D 2-V to 5.5-V VCC Operation Max tpd of 10.5 ns at 5 V Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


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    PDF SN54LV166A, SN74LV166A SCLS456A 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original
    PDF SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) SN54LV166A SN74LV166A SN74LV166ANSR

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


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    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A

    SN74LV166A

    Abstract: A115-A C101 SN54LV166A
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A SN74LV166A A115-A C101 SN54LV166A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, 74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original
    PDF SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)