SN74LV161
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
SN74LV161
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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A115-A
Abstract: C101 SN54LV161A SN74LV161A
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
A115-A
C101
SN54LV161A
SN74LV161A
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP (Output Ground Bounce)
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
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Untitled
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
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PDF
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A115-A
Abstract: C101 SN54LV161A SN74LV161A
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
A115-A
C101
SN54LV161A
SN74LV161A
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PDF
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A115-A
Abstract: C101 SN54LV161A SN74LV161A
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
A115-A
C101
SN54LV161A
SN74LV161A
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PDF
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A115-A
Abstract: C101 SN54LV161A SN74LV161A
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
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Original
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SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
LV161A
A115-A
C101
SN54LV161A
SN74LV161A
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PDF
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