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    National Semiconductor Corporation DM54LS109AJ

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    DM54LS109A Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Type PDF
    DM54LS109A National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM54LS109AJ National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM54LS109AJ National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM54LS109AM National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM54LS109AN National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM54LS109AW National Semiconductor 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output Scan PDF
    DM54LS109AW National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF

    DM54LS109A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 54LS109,DM54LS109A,DM74LS109A 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J- Flip-Flops with Preset, Clear, and Complementary Outputs Literature Number: SNOS278A 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs


    Original     		PDF 54LS109 DM54LS109A DM74LS109A DM74LS109A SNOS278A

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109A DM54LS109AJ DM54LS109AW DM74LS109A DM74LS109AM DM74LS109AN J16A
    Text: 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs The J and K data is accepted by the flip-flop on the rising edge of the


    Original     		PDF 54LS109 DM54LS109A DM74LS109A 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109A DM74LS109AM DM74LS109AN J16A

    DM74LS109AN

    Abstract: DM54LS109AW DM74LS109A DM74LS109AM J16A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ
    Text: DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the


    Original     		PDF DM74LS109A DM74LS109AN DM54LS109AW DM74LS109A DM74LS109AM J16A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ

    Untitled

    Abstract: No abstract text available
    Text: Z9A National SLA Semiconductor 54LS109/DM54LS109A/DM74LSJI09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJI09A

    Untitled

    Abstract: No abstract text available
    Text: LS109A National Semiconductor 54LS109/DM54LS109A/DM74LSJ09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ09A

    Untitled

    Abstract: No abstract text available
    Text: June 1989 54LS109/DM54LS109A/DM74LSJ109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ109A

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AM DM74LS109AN J16A M16A
    Text: June 1989 54LS109/DM54LS109A/DM74LSjK 9A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig£ered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ109A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AM DM74LS109AN J16A M16A

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109
    Text: LS109A National Semiconductor 54LS109/DM54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LS109A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109

    Scans-051

    Abstract: No abstract text available
    Text: E M IC O N D U C T O R t General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a volt­


    OCR Scan     		PDF DM74LS109A 16-Lead DM74LS109AN 54LS109FMQB DM54LS109AW Scans-051