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    CDC31 Search Results

    CDC31 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CDC319DBR Texas Instruments 1-Line to 10-Line Clock Driver with I2C Control Interface 28-SSOP 0 to 70 Visit Texas Instruments
    CDC318ADLRG4 Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70 Visit Texas Instruments Buy
    CDC319DB Texas Instruments 1-Line to 10-Line Clock Driver with I2C Control Interface 28-SSOP 0 to 70 Visit Texas Instruments Buy
    CDC318ADLR Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70 Visit Texas Instruments Buy
    CDC318ADLG4 Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70 Visit Texas Instruments Buy
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    CDC31 Price and Stock

    Rochester Electronics LLC CDC318ADLR

    CDC318A 1-LINE TO 18-LINE CLOCK
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    DigiKey CDC318ADLR Bulk 16,000 58
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    Rochester Electronics LLC CDC319DBR

    IC CLK BUFFER 1:10 100MHZ 28SSOP
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    DigiKey CDC319DBR Bulk 13,662 54
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    Rochester Electronics LLC CDC319DB

    IC CLK BUFFER 1:10 100MHZ 28SSOP
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    DigiKey CDC319DB Bulk 4,827 46
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    Rochester Electronics LLC CDC318ADL

    CDC318A 1-LINE TO 18-LINE CLOCK
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    DigiKey CDC318ADL Bulk 4,265 49
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    Rochester Electronics LLC CDC318DLR

    LOW SKEW CLOCK DRIVER
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CDC318DLR Bulk 1,000 286
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    Find more CDC31 price and stock on Findchips.com

    CDC31 Datasheets (29)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CDC318 Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I 2 C CONTROL INTERFACE Original PDF
    CDC318A Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I 2 C CONTROL INTERFACE Original PDF
    CDC318ADL Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE Original PDF
    CDC318ADL Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADL Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLG4 Texas Instruments IC CLOCK DISTRIBUTION S Original PDF
    CDC318ADLG4 Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLG4 Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLR Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE Original PDF
    CDC318ADLR Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLR Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLRG4 Texas Instruments IC CLOCK DISTRIBUTION Singl Original PDF
    CDC318ADLRG4 Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318ADLRG4 Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318DL Texas Instruments Drivers, 1 To 18 Line Clock Driver With I2C Control Interface Original PDF
    CDC318DL Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318DLR Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
    CDC318DLR Texas Instruments Drivers, 1 To 18 Line Clock Driver With I2C Control Interface Original PDF
    CDC319 Texas Instruments 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE Original PDF
    CDC319DB Texas Instruments 1-Line to 10-Line Clock Driver with I2C Control Interface Original PDF

    CDC31 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original     		PDF CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin scas590 CDC319DBR CDC319IBIS

    CDC318

    Abstract: No abstract text available
    Text: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC318 18-LINE SCAS587B 1-to-18 MIL-STD-883, 48-Pin CDC318

    CDC319

    Abstract: CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC319 10-LINE SCAS590A 1-to-10 MIL-STD-883, 28-Pin CDC319 CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150

    CDC319

    Abstract: MO-150
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC319 10-LINE SCAS590A 1-to-10 MIL-STD-883, 28-Pin CDC319 MO-150

    Untitled

    Abstract: No abstract text available
    Text: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC318 18-LINE SCAS587B 1-to-18 MIL-STD-883, 48-Pin

    48-PIN

    Abstract: CDC318A CDC318ADL CDC318ADLG4
    Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A – SEPTEMBER 1998 – REVISED JUNE 2002 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A CDC318ADL CDC318ADLG4

    48-PIN

    Abstract: CDC318A CDC318ADL CDC318ADLG4 CDC318ADLR
    Text: CDC318A 1ĆLINE TO 18ĆLINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A − SEPTEMBER 1998 − REVISED JUNE 2002 D High-Speed, Low-Skew 1-to-18 Clock Buffer D D D D D D D D D DL PACKAGE TOP VIEW for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A CDC318ADL CDC318ADLG4 CDC318ADLR

    K3638

    Abstract: 4Y04
    Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A – SEPTEMBER 1998 – REVISED JUNE 2002 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin K3638 4Y04

    48-PIN

    Abstract: CDC318A
    Text: CDC318A 1ĆLINE TO 18ĆLINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A − SEPTEMBER 1998 − REVISED JUNE 2002 D High-Speed, Low-Skew 1-to-18 Clock Buffer D D D D D D D D D DL PACKAGE TOP VIEW for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A

    MO-150

    Abstract: CDC319
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original     		PDF CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin MO-150 CDC319

    k3638

    Abstract: No abstract text available
    Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A – SEPTEMBER 1998 – REVISED JUNE 2002 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin k3638

    CDC319

    Abstract: CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC319 10-LINE SCAS590A 1-to-10 MIL-STD-883, 28-Pin CDC319 CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150

    CDC318

    Abstract: CDC318DL CDC318DLR
    Text: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC318 18-LINE SCAS587B 1-to-18 MIL-STD-883, 48-Pin CDC318 CDC318DL CDC318DLR

    CDC318

    Abstract: No abstract text available
    Text: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC318 18-LINE SCAS587B 1-to-18 MIL-STD-883, 48-Pin CDC318

    CDC319

    Abstract: MO-150
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original     		PDF CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin CDC319 MO-150

    CDC319

    Abstract: CDC319DB CDC319DBR CDC319DBRG4 MO-150
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC319 10-LINE SCAS590A 1-to-10 MIL-STD-883, 28-Pin CDC319 CDC319DB CDC319DBR CDC319DBRG4 MO-150

    Untitled

    Abstract: No abstract text available
    Text: CDC318A 1ĆLINE TO 18ĆLINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A − SEPTEMBER 1998 − REVISED JUNE 2002 D High-Speed, Low-Skew 1-to-18 Clock Buffer D D D D D D D D D DL PACKAGE TOP VIEW for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin

    Untitled

    Abstract: No abstract text available
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC319 10-LINE SCAS590A 1-to-10 MIL-STD-883, 28-Pin

    Untitled

    Abstract: No abstract text available
    Text: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original     		PDF CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin scas590 CDC319DBR CDC319IBIS

    CDC318A

    Abstract: No abstract text available
    Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614 – SEPTEMBER 1998 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original     		PDF CDC318A 18-LINE SCAS614 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A

    48-PIN

    Abstract: CDC318A
    Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A – SEPTEMBER 1998 – REVISED JUNE 2002 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications


    Original     		PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A

    TL 650 ht

    Abstract: No abstract text available
    Text: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SCAS587B - JANUARY 1997 - REVISED MARCH 1998 High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM SDRAM Clock Buffering Applications Output Skew, tSk(0), Less Than 250 ps Pulse Skew, tSk(P), Less Than 650 ps


    OCR Scan     		PDF CDC318 18-LINE SCAS587B 1-to-18 MIL-STD-883, 48-Pin TL 650 ht

    CDC319

    Abstract: MO-150
    Text: CDC319 l-LINE TO 10-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SCAS590 - DECEMBER 1997 High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tSk(0), Less Than 250 ps Pulse Skew, tSk(P), Less Than 500 ps


    OCR Scan     		PDF CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin MO-150

    Untitled

    Abstract: No abstract text available
    Text: CDC318A l-LINE TO 18-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SC AS 614 - SE P TE M B E R 1998 High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM SDRAM Clock Buffering Applications Output Skew, tSk(0), Less Than 250 ps Pulse Skew, tSk(P), Less Than 500 ps


    OCR Scan     		PDF CDC318A 18-LINE 1-to-18 100-MHz MIL-STD-883, 48-Pin