8KX16BIT RAM Search Results

8KX16BIT RAM Result Highlights (5)

Part	ECAD Model	Manufacturer	Description	Download	Buy
MD2114A/BVA		Rochester Electronics LLC	STATIC RAM; 1K X 4
27S13A/BEA		Rochester Electronics LLC	27S13A - 2048-Bit (512X4) Bipolar RAM
CY7C09389V-9AXI		Rochester Electronics	CY7C09389 - 3.3 V 64 K X 18 Synchronous Dual-Port Static RAM, Industrial Temp
CDP1824CD/B		Rochester Electronics LLC	CDP1824C - 32-Word x 8-Bit Static RAM
MC68A02CL		Rochester Electronics LLC	MC68A02 - Microprocessor With Clock and Oprtional RAM

8KX16BIT RAM Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
8kx16bit ram Abstract: 8kx16bit trz a7 Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration – 14 Common I/O TAG Bits – 2 Separate I/O Status Bits (VLD and DTY) • Optimized for 256KB cache and 4GB cacheable space	Original	8Kx16-BIT) IDT71V218 256KB 10/12/15ns 48-pin IDT71V218 200mV 71V218 SO48-1) 8kx16bit ram 8kx16bit trz a7	PDF
TAG10_ Abstract: tag12 TAG13 8kx16bit Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration – 14 Common I/O TAG Bits – 2 Separate I/O Status Bits (VLD and DTY) • Optimized for 256KB cache and 4GB cacheable space	Original	8Kx16-BIT) IDT71V218 256KB 10/12/15ns 48-pin IDT71V218 200mV 71V218 SO48-1) TAG10_ tag12 TAG13 8kx16bit	PDF
TAG12 Abstract: TAG10_ tag13 8kx16bit cache tag Static RAM Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration – 14 Common I/O TAG Bits – 2 Separate I/O Status Bits (VLD and DTY) • Optimized for 256KB cache and 4GB cacheable space	Original	8Kx16-BIT) IDT71V218 256KB 10/12/15ns 48-pin IDT71V218 200mV 71V218 SO48-1) TAG12 TAG10_ tag13 8kx16bit cache tag Static RAM	PDF
blocks in memory organization Abstract: ADSP-21060 reference manual for registers initial 8kx16bit ADSP-21060 reference manual fast page mode dram controller harvard architecture block diagram ADSP-2100 ADSP-21000 ADSP-21060 ADSP-21061 Text: Memory 5.1 5 OVERVIEW ADSP-2106x processors contain a large dual-ported memory for onchip program and data storage. On these processors, the two memory blocks are named Block 0 and Block 1. A comparison of on-chip memory SRAM available on ADSP-2106x processors is as follows:	Original	ADSP-2106x 48-bit 32-bit 16-bit ADSP-21060 ADSP-21062 ADSP-21061 blocks in memory organization ADSP-21060 reference manual for registers initial 8kx16bit ADSP-21060 reference manual fast page mode dram controller harvard architecture block diagram ADSP-2100 ADSP-21000 ADSP-21060 ADSP-21061	PDF
induction cooker schematic diagram Abstract: induction cooker block diagrams APC UPS CIRCUIT DIAGRAM of rs 550 tms320e14fzl schematic diagram induction cooker induction cooker schematic diagram E1 error TMS320C50PQ target board evaluation kit induction cooker block diagrams Texas TMS320E15FZL TMS320C26FNL Text: Release Date: 4–29–94 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information	Original	g320E2x, TMS320LC1x, TMS320P1x, XDS/22 XDS510 TMS320C40, TMS320C5x, induction cooker schematic diagram induction cooker block diagrams APC UPS CIRCUIT DIAGRAM of rs 550 tms320e14fzl schematic diagram induction cooker induction cooker schematic diagram E1 error TMS320C50PQ target board evaluation kit induction cooker block diagrams Texas TMS320E15FZL TMS320C26FNL	PDF
ADSP-21060 1993 Abstract: RXB38 ADSP-21000 national linear application notes book CU01 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-2106X A-18 Text: ADSP-2106x SHARC Processor User’s Manual Revision 2.1, March 2004 Part Number 82-000795-03 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express	Original	ADSP-2106x ADSP-21060 1993 RXB38 ADSP-21000 national linear application notes book CU01 ADSP-21060 ADSP-21061 ADSP-21062 A-18	PDF
8M656 Abstract: IDT7164 IDT8M656S50 IDT8M628 Text: INT EGR AT E» DEVICE T7 » I J 4A2S771 00D571S 7 I ! 482 5 77 1 'INTEGRATED' DEV iCE ' 97D 02712 256K 16K x 16-BIT & 128K (8K x 16-BIT) CMOS STATIC RAM MODULE him Integrated Device Technology Inc. T -4 6 -2 3 -1 4 D IDT8M656S 1DT8M628S FEATURES: DESCRIPTION:	OCR Scan	4A2S771 00D571S 16-BIT) IDT8M656S 1DT8M628S 256K/128K-blt IDT8M656) IDT8M628) 16/8K 8M656 IDT7164 IDT8M656S50 IDT8M628	PDF
IDT8M656S50 Abstract: 8M656 T7164 Text: 256K 16K x 16-BIT & 128K (8K X 16-BIT) C M O S STATIC RAM M O DULE IDT8M656S IDT8M628S FEATURES: DESCRIPTION: • H ig h -d e n sity 2 5 6 K /1 2 8 K -b it C M O S sta tic RAM m o du le s • 16K x 16 o rg a n iza tio n (IDT8M 656) w ith 8K x 16 o p tio n	OCR Scan	16-BIT) 16/8K IDT8M656S/IDT8M628S MIL-STD-883, 8M656 8M628 IDT8M656S50 T7164	PDF
Untitled Abstract: No abstract text available Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors :JÖi'Np Jdt) PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration - 14 Common I/O TAG Bits - 2 Separate I/O Status Bits (VLD and DTY) • Optimized for 256KB cache and 4GB cacheable space	OCR Scan	8Kx16-BIT) IDT71V218 256KB 48-pin 8Kx16 200mV 71V218	PDF
Untitled Abstract: No abstract text available Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration - 14 Com m on I/O TA G Bits - 2 S eparate I/O Status Bits (VLD and D TY) • Optim ized for 256K B cache and 4G B cacheable space	OCR Scan	8Kx16-BIT) IDT71V218 48-pin IDT71V21B 8Kx16 4A25771	PDF
Untitled Abstract: No abstract text available Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8 K x 16 C onfiguration - 14 Com m on I/O TAG Bits - 2 Separate I/O Status Bits (VLD and DTY) • O ptim ized for 256KB cache and 4G B cacheable space	OCR Scan	8Kx16-BIT) IDT71V218 256KB 48-pin IDT71V2NOT ro-we-2070	PDF
8kx16bit ram Abstract: No abstract text available Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8 K x 16 C onfiguration - 14 Com m on I/O TAG Bits - 2 Separate I/O Status Bits (VLD and DTY) • O ptim ized for 256KB cache and 4G B cacheable space	OCR Scan	3V128K 8Kx16-BIT) IDT71V218 256KB -10/12/15ns 48-pin MO-118, /15/W 727-fUÂ 8kx16bit ram	PDF