Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-250/200/167 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-250/200/167
165-Bump
165-bump,
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
8342SxxA
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GS8342S36AE-167
Abstract: GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300 GS8342S18AGE-250 GS8342S18AE-167
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
8342SxxA
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
GS8342S18AGE-250
GS8342S18AE-167
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Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
PDF
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
|
Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
|
Original
|
PDF
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
8342SxxA
|
GS8342S18AE-250
Abstract: GS8342S36AE-167 GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300
Text: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
118/36AE-333/300/250/200/167
8342SxxA
GS8342S18AE-250
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
GS834x36aE-300T.
8342SxxA
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GS8342S36AE-167
Abstract: GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
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Original
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PDF
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GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
15ble
8342SxxA
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
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