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    Harris Semiconductor HS1-80C85RH-8

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    80C85RH Datasheets Context Search

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    5962R9582401QQC

    Abstract: 5962R9582401QXC HS80C85RH HS-80C85RH
    Text: S E M I C O N D U C T O R HS-80C85RH Radiation Hardened 8-Bit CMOS Microprocessor February 1996 Features Description • Devices QML Qualified in Accordance With MIL-PRF-38535 The HS-80C85RH is an 8-bit CMOS microprocessor fabricated using the Harris radiation hardened self-aligned junction isolated SAJI silicon gate technology. Latch-up free


    Original     		PDF HS-80C85RH MIL-PRF-38535 HS-80C85RH 038mm) 5962R9582401QQC 5962R9582401QXC HS80C85RH

    8085 opcode sheet free

    Abstract: HS1-80C85RH-8 80c85 HS-80C85RH 8085 opcode sheet instructions 8085 TCA 321 5962R9582401QQC 5962R9582401QXC HS80C85RH
    Text: T UCT ROD RODUC P E P T E E OL UT r at OBS UBSTIT H or e n te c S R C 6 t E 8 r /t s Sheet 0C po IBL S SData H -8 i c a l S u p e r s i l . c o m PO S t n n h i . c ur Te or w ww IL ac t o c o n t - IN T E R S 8 8 8 1- HS-80C85RH Radiation Hardened 8-Bit CMOS


    Original     		PDF HS-80C85RH HS-80C85RH 8085 opcode sheet free HS1-80C85RH-8 80c85 8085 opcode sheet instructions 8085 TCA 321 5962R9582401QQC 5962R9582401QXC HS80C85RH

    intersil 8212

    Abstract: IC 8212 sa302 5962R9581801QJC 5962R9581801QXC 5962R9581801V9A 5962R9581801VJC 5962R9581801VXC HS-80C85RH HS-82C12RH
    Text: HS-82C12RH TM Data Sheet August 2000 Radiation Hardened 8-Bit Input/Output Port The Intersil HS-82C12RH is a radiation hardened 8-bit input/output port designed for use with the HS-80C85RH radiation hardened microprocessor. It is manufactured using a self-aligned, junction-isolated EPI-CMOS process and


    Original     		PDF HS-82C12RH HS-82C12RH HS-80C85RH intersil 8212 IC 8212 sa302 5962R9581801QJC 5962R9581801QXC 5962R9581801V9A 5962R9581801VJC 5962R9581801VXC HS-80C85RH

    TCA 875

    Abstract: 5962R9582401QQC 5962R9582401QXC HS80C85RH HS-80C85RH 8085 mnemonic opcode 83C55R TCA910 sand
    Text: HS-80C85RH Radiation Hardened 8-Bit CMOS Microprocessor February 1996 Features Description • Devices QML Qualified in Accordance With MIL-PRF-38535 The HS-80C85RH is an 8-bit CMOS microprocessor fabricated using the Intersil radiation hardened self-aligned junction isolated SAJI silicon gate technology. Latch-up free


    Original     		PDF HS-80C85RH MIL-PRF-38535 HS-80C85RH TCA 875 5962R9582401QQC 5962R9582401QXC HS80C85RH 8085 mnemonic opcode 83C55R TCA910 sand

    80C85

    Abstract: timing diagram of call instruction in 8085 microprocessor INSTRUCTION SET 8085 with opcode 80c85 8085 8085 opcode sheet free 8085 mnemonic opcode 8085 microprocessor opcode sheet opcode sheet 8085 8085 opcode sheet for addition of two numbers TCA 321
    Text: [ /Title HS80C85 RH /Subject (Radiation Hardened 8Bit CMOS Microprocessor) /Autho r () /Keywords (Intersil Corporation, semiconductor, Radiation Hardened, RH, Rad Hard, QML, Satellite, SMD, Class T UCT ROD RODUC P E P T E E OL UT OBS UBSTIT RH S 8 E 0C 6


    Original     		PDF HS80C85 -80C86 HS-80C85RH HS-80C85RH 80C85 timing diagram of call instruction in 8085 microprocessor INSTRUCTION SET 8085 with opcode 80c85 8085 8085 opcode sheet free 8085 mnemonic opcode 8085 microprocessor opcode sheet opcode sheet 8085 8085 opcode sheet for addition of two numbers TCA 321

    y4 smd transistor

    Abstract: smd g2a smd g2b 30373 y0 smd transistor y4 smd y6 smd transistor smd transistor y5 HS SMD SMD Transistor Y6
    Text: HS-54C138RH T CT DUC PRO PRODU E T E E 8 L T 3 t 1 O U OBS UBSTIT S/HCTS Center a S C port c H s E t , / L 8 om 13 Sheetup SIB Data POS S/ACTS hnical S intersil.c . AC ur Tec www ct o RSIL or a t n E co 8-INT 1-88 Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer


    Original     		PDF HS-54C138RH CTS138, HS-54C138RH y4 smd transistor smd g2a smd g2b 30373 y0 smd transistor y4 smd y6 smd transistor smd transistor y5 HS SMD SMD Transistor Y6

    y4 smd

    Abstract: y6 smd transistor y6 smd y4 smd transistor smd g2b smd g2a Y5 smd 30373 smd y7 smd transistor y5
    Text: [ /Title HS54C13 8RH /Subject (Radiation Hardened 3Line to 8-Line Decod er/Dem ultiplexer) /Autho r () /Keywords (Intersil Corporation, semiconductor, Radiation Hardened, RH, Rad Hard, QML, Satellite, SMD, HS-54C138RH T CT DUC PRO PRODU E T E E 8 L T 3 O


    Original     		PDF HS54C13 HS-54C138RH HS-54C138RH 54LS138 y4 smd y6 smd transistor y6 smd y4 smd transistor smd g2b smd g2a Y5 smd 30373 smd y7 smd transistor y5

    HS-81C55RH

    Abstract: HS-81C56RH 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH intel 8155 pa 3029 b
    Text: HS-81C55RH, HS-81C56RH Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.


    Original     		PDF HS-81C55RH, HS-81C56RH MIL-PRF-38535 HS-81C55/56RH HS-81C55RH HS-81C56RH 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH intel 8155 pa 3029 b

    intel 8155

    Abstract: 8155 port 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH
    Text: HS-81C55RH HS-81C56RH S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.


    Original     		PDF HS-81C55RH HS-81C56RH MIL-PRF-38535 HS-81C55/56RH 1-800-4-HARRIS intel 8155 8155 port 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH

    smd g2b

    Abstract: smd g2a smd transistor 44w transistor smd Y2 Y1 smd y5 semiconductor 54LS138 5962R9582501QEC CDFP4-F16 HS-54C138RH
    Text: HS-54C138RH Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer February 1996 Features Pinouts • Devices QML Qualified in Accordance With MIL-PRF-38535 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T16 TOP VIEW • Detailed Electrical and Screening Requirements are


    Original     		PDF HS-54C138RH MIL-PRF-38535 MIL-STD-1835 CDIP2-T16 smd g2b smd g2a smd transistor 44w transistor smd Y2 Y1 smd y5 semiconductor 54LS138 5962R9582501QEC CDFP4-F16 HS-54C138RH

    smd transistor 44w

    Abstract: Y1 smd 30372 54LS138 5962R9582501QEC CDFP4-F16 HS-54C138RH HS-80C85RH smd g2a smd g2b
    Text: HS-54C138RH S E M I C O N D U C T O R Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer February 1996 Features Pinouts • Devices QML Qualified in Accordance With MIL-PRF-38535 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T16


    Original     		PDF HS-54C138RH MIL-PRF-38535 MIL-STD-1835 CDIP2-T16 smd transistor 44w Y1 smd 30372 54LS138 5962R9582501QEC CDFP4-F16 HS-54C138RH HS-80C85RH smd g2a smd g2b

    8085 mnemonic opcode

    Abstract: "call completion" 8085 timing diagram sui 90 H
    Text: HS-80C85RH HARRIS S E M I C O N D U C T O R Radiation Hardened 8-Bit CMOS Microprocessor February 1996 Features Description • Devices QML Qualified in Accordance With MIL-PRF-38535 The HS-80C85RH is an 8-bit CMOS microprocessor fabri­ cated using the Harris radiation hardened self-aligned junc­


    OCR Scan     		PDF HS-80C85RH HS-80C85RH HS80C85RH 038mm) 430E271 8085 mnemonic opcode "call completion" 8085 timing diagram sui 90 H

    pin diagram of 8054 intel microprocessor

    Abstract: 80c85 8085 timing diagram sui 90 H 8085 Mvi r, data (8) immediate addressing mode HS80C85RH HS-80C85RH SA11 SA13
    Text: HS-80C85RH Semiconductor R adiation H ardened 8-B it C M O S M ic ro p ro c e sso r February 1996 Features Description • Devices QML Qualified in Accordance With MIL-PRF-38535 The HS-80C85RH is an 8-bit CMOS microprocessor fabri­ cated using the Harris radiation hardened self-aligned jun c­


    OCR Scan     		PDF HS-80C85RH MIL-PRF-38535 pin diagram of 8054 intel microprocessor 80c85 8085 timing diagram sui 90 H 8085 Mvi r, data (8) immediate addressing mode HS80C85RH HS-80C85RH SA11 SA13

    Untitled

    Abstract: No abstract text available
    Text: HS-80C85RH HARRIS S E M I C O N D U C T O R Radiation Hardened 8-Bit CMOS Microprocessor September 1995 Features Pinouts 40 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T40 TOP VIEW U xi [T m VD D • Radiation Hardened EPI-CMOS


    OCR Scan     		PDF HS-80C85RH MIL-STD-1835 CDIP2-T40 038mm)

    80c85

    Abstract: HS80C85
    Text: S H S - 5 4 C 1 3 8 R H R a d ia t io n H a r d e n e d February 1996 3 - L in e to 8 - L in e D e c o d e r /D e m u lt ip le x e r Features Pinouts • Devices QML Qualified in Accordance With MIL-PRF-38535 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP


    OCR Scan     		PDF MIL-PRF-38535 IL-STD-1835 CDIP2-T16 HS-54C 0b573D 80c85 HS80C85

    80c85

    Abstract: Intel 8155 Port IC intel 8155 5962R9XXXX01QXC
    Text: i l i h a r r is HS-81C55RH 81 S E M I C O N D U C T O R Radiation Hardened 256 X 8 CMOS RAM March 1996 Features Description • Devices QM L Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.


    OCR Scan     		PDF HS-81C55RH HS-81C55/56RH HS-80C85RH 500ns HS-81 C55/56RH HS-81r 1-800-4-HARRIS 80c85 Intel 8155 Port IC intel 8155 5962R9XXXX01QXC

    sidd

    Abstract: SA2995 Harris top marking
    Text: 33 fcKHffiSR HS-54C138RH Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer December 1992 Pinouts Features 16 PIN DIP CASE OUTLINE D2, CONFIGURATION 3 TOP VIEW • Radiation Hardened EPI-CMOS - Total Dose 1 x 10s RAD Si - Latch-Up Immune > 1 x 1012 RAD(Si)/s


    OCR Scan     		PDF HS-54C138RH SA2995 80C85RH HS-54C138RH sidd SA2995 Harris top marking

    81C55

    Abstract: intel 8155 80C85 8155 intel microprocessor programming 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH 11KA2
    Text: 5ÖE J> H A RR IS S E M I C O N D SE CT OR HARRIS S E M I C O N D U C T O R 4 3 0 S 27 1 0 0 4 5 5 3 t 217 « H A S HS-81C55RH HS-81C56RH Radiation Hardened 256 x 8 CMOS RAM Decem ber 1992 Features “ * 'P 4 U Pinouts '2 3 r l2 - . 4 0 P IN C E R A M IC D IP


    OCR Scan     		PDF HS-80C85RH 14-Bit HS-81C55/56RH 81C55 intel 8155 80C85 8155 intel microprocessor programming 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH 11KA2

    Untitled

    Abstract: No abstract text available
    Text: HS-54C138RH S em iconductor Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer February 1996 Pinouts Features • Devices QML Qualified in Accordance With MIL-PRF-38535 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T16 • Detailed Electrical and Screening Requirements are


    OCR Scan     		PDF HS-54C138RH MIL-PRF-38535 MIL-STD-1835 CDIP2-T16

    Untitled

    Abstract: No abstract text available
    Text: ÏB H S - 5 4 C 1 3 8 R H Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer Septem ber 1995 Features Pinouts • Radiation Hardened EPI-CMOS 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T16 TOP VIEW - Total Dose 1 x 10s RAD(Si)


    OCR Scan     		PDF MIL-STD-1835 CDIP2-T16 SA2995 80C85RH HS-54C138RH

    81C55

    Abstract: s125
    Text: H A R R HS-81C55RH HS-81C56RH I S S E M I C O N D U C T O R Radiation Hardened 256 X 8 CMOS RAM December 1992 Pinouts Features 40 PIN CERAMIC DIP CASE OUTLINE D5, CONFIGURATION 3 • Radiation Hardened EPI-CMOS - Parametrlcs Guaranteed 1 x 10s RAD SI - Transient Upset > 1 x 10 RAD(SI)/s


    OCR Scan     		PDF HS-81C55RH HS-81C56RH B155/56 HS-80C85RH HS-81C55/56RH 81C55 s125

    sem ad 222m

    Abstract: ic 8155 timer sem aa 222m T81C
    Text: HS-81C55RH HS-81C56RH HARRIS S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.


    OCR Scan     		PDF HS-81C55RH HS-81C56RH HS-81C55/56RH HS-80C85RH 500ns HS-81G55/56RH HS-81C55 1-800-4-HARRIS sem ad 222m ic 8155 timer sem aa 222m T81C

    Untitled

    Abstract: No abstract text available
    Text: 33 HS-54C138RH December 1992 Features • Radiation Hardened EPI-CMOS - Total Dose 1 x 10s RAD Si - Latch-Up Immune > 1 x 1012 RAD(Si)/s • Multiple Input Enable for Easy Expansion • Single Power Supply +5V • Outputs Active Low • Low Standby Power (0.5mW Max at +5V)


    OCR Scan     		PDF HS-54C138RH SA2995 80C85RH HS-54C138RH

    Untitled

    Abstract: No abstract text available
    Text: m W HS-81C55RH HS-81C56RH HARRIS S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM D e c e m b e r 1992 Features Pinouts 40 PIN CERAMIC DIP CASE OUTLINE D5, CONFIGURATION 3 TOP VIEW • R a d ia tio n H a rd e n e d E P I-C M O S - P a r a m e lric s G u a ra n te e d 1 x 1 0 s R A D S i


    OCR Scan     		PDF HS-81C55RH HS-81C56RH HS-81C55/56RH