cy7c109l-15vi
Abstract: CY7C109L15VI CY7C109L CY7C1009 CY7C109 CY7C1009-15VI cy7c109-15zc CY7C109-15VI
Text: CY7C109 7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low-power version) • 2.0V Data Retention (Low-power version) • Automatic power-down when deselected
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CY7C109
CY7C1009
CY7C109
CY7C1009
cy7c109l-15vi
CY7C109L15VI
CY7C109L
CY7C1009-15VI
cy7c109-15zc
CY7C109-15VI
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Untitled
Abstract: No abstract text available
Text: THIS SPEC IS OBSOLETE Spec No: 38-05038 Spec Title: CY7C109B, 7C1009B 128K X 8 STATIC RAM Sunset Owner: Prashanth Jnanendra PRAS Replaced by: NONE CY7C109B 7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109B/7C1009B is a high-performance CMOS
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CY7C109B,
CY7C1009B
CY7C109B
CY7C1009B
400-mil-wide
32-pin
300-mil-wide
CY7C109B/CY7C1009B
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PDF
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ATPA
Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C
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CY2147-35C
CY7C147-35C
CY7C147-45C
CY91L22-35C
CY7C122-35C
CY2147-45C
CY7C148-35C
CY7C148-25C+
ATPA
7130SA100P
24l01
7C263/4-35C
7164S15Y
cy9122-25
7133SA35J
7142sa55
7130sa55p
cy2149-45c
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C109D 7C1009D 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features • Pin- and function-compatible with CY7C109B/7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA
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CY7C109D
CY7C1009D
CY7C109B/CY7C1009B
CY7C109D
32-pin
400-Mil
CY7C1009D
300-Mil
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PDF
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CY7C1009
Abstract: No abstract text available
Text: 1CY 7C10 09 PRELIMINARY 7C1009 128K x 8 Static RAM Features • High speed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 µW • Available in 450 x 550-mil LCC
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CY7C1009
550-mil
CY7C1009
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PDF
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CY7C1009
Abstract: CY7C109
Text: fax id: 1047 CY7C109 7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low power version) • 2.0V Data Retention (Low power version) • Automatic power-down when deselected
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CY7C109
CY7C1009
CY7C1009
CY7C109
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PDF
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81c78
Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Text: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M
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2147-35C
2147-45C
2147-45M+
2147-55C
2147-55M
2148-35C
2148-35M
2148-45C
81c78
7C291
5962-8515505RX
27PC256-12
PAL164A
8464C
5C6408
72018
39C10B
MACH110 cross reference
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Untitled
Abstract: No abstract text available
Text: CY7C109B 7C1009B 128K x 8 Static RAM Features put Enable OE , and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O 0 through I/O 7) is then
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CY7C109B
CY7C1009B
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CY7C1009V33
Abstract: CY7C109V33
Text: 3 7C1009V33 CY7C109V33 PRELIMINARY 128K x 8 Static RAM Features memory expansion is provided by an active LOW chip enable CE1 , an active HIGH chip enable (CE2), an active LOW output enable (OE), and three-state drivers. Writing to the device is accomplished by taking chip enable one (CE1) and write
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CY7C1009V33
CY7C109V33
CY7C1009V33
CY7C109V33
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PDF
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MSM 6290
Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+
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2147-35C
7C147-35C
27S03M
54S189M
7C170A-45M
7C170A-35M
2147-45C
27S07AC
7C190-25C
MSM 6290
msm 5562
27c256 intel
62c512
AP 2068
27C512 microchip
62256
57C256
27C512 SGS-THOMSON
27C512-150
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PDF
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EPM5128LC
Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C
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CY2148-35C
CY21L48-35C
CY7C168A-35C
CY7C168A-25C
5962-8871309XX
5962-89839112X
CY7C148-35C
CY7C168A-45M
CY7C168A-35M+
EPM5128LC
IDT CYPRESS CROSS REFERENCE clocks
epm5064lc-1
EPM5128LC-1
EPM5064LC
EPM5128LC-2
EPM5128GI
EPM5128JC-1
8464c
5962-8871309
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C109D 7C1009D 1-Mbit 128K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power The CY7C109D/7C1009D is a high-performance CMOS
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CY7C109D
CY7C1009D
CY7C109B/CY7C1009B
32-pin
400-Mil
CY7C1009D
300-Mil
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PDF
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cy7c109b-15vc
Abstract: CY7C109B-15VI 109b1 cypress semiconductor cy7c109b-20zi
Text: 7C1009B CY7C109B 7C1009B 128K x 8 Static RAM Features • High speed — tAA = 12 ns • Low active power — 495 mW max. 12 ns • Low CMOS standby power — 55 mW (max.) 4 mW • 2.0V Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs
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1CY7C1009B
CY7C109B
CY7C1009B
cy7c109b-15vc
CY7C109B-15VI
109b1
cypress semiconductor cy7c109b-20zi
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PDF
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Untitled
Abstract: No abstract text available
Text: THE FOLLOWING SECOND QUARTER REPORT 1996, the sections entitled “To Our Shareholders” and “Market Perspective” may contain forwardlooking statements about the prospects for Cypress as well as the semiconductor industry more generally including without limitation statements about,
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Untitled
Abstract: No abstract text available
Text: 7C1009: 1 1 -2 5 -9 1 Revision: Monday, January 11,1993 — ^ MAR S 3 1993 PRELIMINARY CYPRESS SEMICONDUCTOR 7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW
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OCR Scan
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7C1009:
CY7C1009
128Kx
550-mil
CY7C1009
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PDF
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CY7C1009
Abstract: 7C1009 A14C
Text: PRELIMINARY r y f|pPA RJL- lrP Anni I 7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW The 7C1009 is a high-performance
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OCR Scan
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CY7C1009
550-mil
CY7C1009
7C1009
A14C
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PDF
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Untitled
Abstract: No abstract text available
Text: fax id: 1089 =mmmm rrm - 7C1009V33 C Y7C109 V33 PRELIMINARY 128K x 8 Static RAM memory expansion is provided by an active LOW chip enable CE-| , an active HIGH chip enable (CE2), an active LOW out put enable (OE), and three-state drivers. Writing to the device
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OCR Scan
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CY7C1009V33
Y7C109
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PDF
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Untitled
Abstract: No abstract text available
Text: fax id: 1047 CY7C109 7C1009 ^C YPR ESS 128K x 8 Static RAM active HIGH chip enable CE 2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE 2 ) input HIGH. Data on
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OCR Scan
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CY7C109
CY7C1009
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY 7C1009 128K x 8 Static R AM Features Functional Description • High speed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 ^iW • AvaUable in 450 x 550-mil LCC
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OCR Scan
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CY7C1009
550-mil
CY7C1009
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PDF
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G 1009l
Abstract: CY7C1009 CY7C109
Text: fax id: 1047 CY7C109 7C1009 CYPRESS 128K x 8 Static RAM Features active HIG H chip enable C E 2 , an active LO W ou tput enable (OE), and three -state drivers. W riting to the device is a cco m plished by takin g chip enable one (CE-|) and w rite enable (WE)
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OCR Scan
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CY7C109
CY7C1009
CY7C1009
G 1009l
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PDF
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V32 Package
Abstract: CY7C1009V33 CY7C109V33
Text: 7C1009V33 CY7C109V33 iF c y p r e s s 128K x 8 Static RAM Features memory expansion is provided by an active LOW Chip Enable CE-| , an active HIGH Chip Enable (CE2), an active LOW Out put Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable one (CE-|) and Write
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OCR Scan
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CY7C1009V33
CY7C109V33
128Kx
CY7C109V33/CY7C1009V33
V32 Package
CY7C1009V33
CY7C109V33
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PDF
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Untitled
Abstract: No abstract text available
Text: C Y 7 C 1 0 0 9 C Y 7 C 1 0 9 CYPRESS 128K 8 Static RAM active HIGH chip enable CE2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE2) input HIGH. Data on
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OCR Scan
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY CYPRESS SEMICONDUCTOR Functional Description • High speed T he 7C1009 is a high-perform ance CM O S static R A M organized as 131,072 w ords by 8 bits. Easy m em ory expansion is provided by an active L O W chip enable C E i , an active H IG H chip e n a ble ( C E 2),
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OCR Scan
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CY7C1009
550-mil
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY ÌJS i CYPRESS 128Kx 8 Static RAM Features Functional Description • H igh speed The 7C1009 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable CE] , an active HIGH chip enable (CE2),
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OCR Scan
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128Kx
CY7C1009
550-m
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PDF
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