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    74LVX27 Search Results

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    74LVX27 Price and Stock

    STMicroelectronics 74LVX273TTR

    IC FF D-TYPE SNGL 8BIT 20TSSOP
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    DigiKey 74LVX273TTR Digi-Reel 4,222 1
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    74LVX273TTR Cut Tape 4,222 1
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    74LVX273TTR Reel 2,500 2,500
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    Bristol Electronics 74LVX273TTR 1,860
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    Quest Components 74LVX273TTR 1,488
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    onsemi 74LVX273MTCX

    IC FF D-TYPE SNGL 8BIT 20TSSOP
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    DigiKey 74LVX273MTCX Cut Tape 2,455 1
    • 1 $0.92
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    74LVX273MTCX Digi-Reel 2,455 1
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    74LVX273MTCX Reel 2,500
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    Avnet Americas 74LVX273MTCX Reel 12 Weeks 5,000
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    Mouser Electronics 74LVX273MTCX 2,045
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    Arrow Electronics 74LVX273MTCX Cut Strips 2,500 12 Weeks 1
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    Onlinecomponents.com 74LVX273MTCX
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    TME 74LVX273MTCX 1
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    Avnet Asia 74LVX273MTCX 12 Weeks 5,000
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    Avnet Silica 74LVX273MTCX 5,000 13 Weeks 2,500
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    EBV Elektronik 74LVX273MTCX 14 Weeks 2,500
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    New Advantage Corporation 74LVX273MTCX 5,000 1
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    onsemi 74LVX273M

    IC FF D-TYPE SNGL 8BIT 20SOIC
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    DigiKey 74LVX273M Tube
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    Avnet Americas 74LVX273M Tube 0 Weeks, 2 Days 3,334
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    Rochester Electronics 74LVX273M 5,908 1
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    Flip Electronics 74LVX273M 23,760
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    Flip Electronics 74LVX273M

    IC FF D-TYPE SNGL 8BIT 20SOIC
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    DigiKey 74LVX273M Bulk 2,500
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    STMicroelectronics 74LVX27TTR

    IC GATE NOR 3CH 3-INP 14TSSOP
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    DigiKey 74LVX27TTR Reel 5,000
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    Find more 74LVX27 price and stock on Findchips.com

    74LVX27 Datasheets (50)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVX27 STMicroelectronics LOW VOLTAGE Triple 3-Input NOR Gate Original PDF
    74LVX27 STMicroelectronics LOW VOLTAGE Triple 3-Input NOR Gate Original PDF
    74LVX273 Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273 Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273 STMicroelectronics LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS Original PDF
    74LVX273 Toshiba Octal D-type Flip Flop With Clear Scan PDF
    74LVX273M Fairchild Semiconductor Low Voltage Octal D Flip-Flop Original PDF
    74LVX273M Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop; Package: SOIC-Wide; No of Pins: 20; Container: Rail Original PDF
    74LVX273M Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273M National Semiconductor Low Voltage Octal D Flip-Flop Original PDF
    74LVX273M STMicroelectronics LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS Original PDF
    74LVX273M STMicroelectronics Low Voltage CMOS Octal D-Type Flip-Flop with Clear (5 V Tolerant Inputs) Original PDF
    74LVX273M National Semiconductor Low Voltage Octal D Flip-Flop Scan PDF
    74LVX273MSCX Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273MTC Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273MTC Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273MTC National Semiconductor Low Voltage Octal D Flip-Flop Original PDF
    74LVX273MTC National Semiconductor Low Voltage Octal D Flip-Flop Scan PDF
    74LVX273MTCX Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF
    74LVX273MTCX Fairchild Semiconductor Low Voltage Octal D-Type Flip-Flop Original PDF

    74LVX27 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVX273

    Abstract: 74LVX273M 74LVX273MTR 74LVX273TTR
    Text: 74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original     		PDF 74LVX273 74LVX273 74LVX273M 74LVX273MTR 74LVX273TTR

    74LVX273MTC

    Abstract: 74LVX273SJ LVX273 M20D MTC20 74LVX273 74LVX273M
    Text: 74LVX273 Low Voltage Octal D Flip-Flop General Description The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.


    Original     		PDF 74LVX273 LVX273 74LVX273MTC 74LVX273SJ M20D MTC20 74LVX273 74LVX273M

    74LVX273

    Abstract: 74LVX273M 74LVX273MTC 74LVX273MTCX 74LVX273MX 74LVX273SJ 74LVX273SJX LVX273 M20D
    Text: 74LVX273 Low Voltage Octal D Flip-Flop General Description Features The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously


    Original     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273MTC 74LVX273MTCX 74LVX273MX 74LVX273SJ 74LVX273SJX M20D

    74LVX273

    Abstract: 74LVX273M 74LVX273MTR 74LVX273TTR
    Text: 74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original     		PDF 74LVX273 74LVX273 74LVX273M 74LVX273MTR 74LVX273TTR

    74LVX27

    Abstract: 74LVX27M 74LVX27MTR 74LVX27TTR TSSOP14
    Text: 74LVX27 LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


    Original     		PDF 74LVX27 74LVX27 PO13G TSSOP14 0080337D 74LVX27M 74LVX27MTR 74LVX27TTR

    74LVX27

    Abstract: 74LVX27MTR 74LVX27TTR TSSOP14
    Text: 74LVX27 LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


    Original     		PDF 74LVX27 74LVX27 74LVX27MTR 74LVX27TTR TSSOP14

    74LVX273

    Abstract: 74LVX273M 74LVX273MTC 74LVX273SJ LVX273 M20D MS-013 MTC20
    Text: Revised March 1999 74LVX273 Low Voltage Octal D-Type Flip-Flop General Description The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.


    Original     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273MTC 74LVX273SJ M20D MS-013 MTC20

    74LVX27

    Abstract: 74LVX27M 74LVX27MTR 74LVX27TTR TSSOP14
    Text: 74LVX27 LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


    Original     		PDF 74LVX27 74LVX27 74LVX27M 74LVX27MTR 74LVX27TTR TSSOP14

    74LVX273

    Abstract: 74LVX273MTR 74LVX273TTR 74LVX27
    Text: 74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original     		PDF 74LVX273 74LVX273 74LVX273MTR 74LVX273TTR 74LVX27

    74LVX27

    Abstract: 74LVX27M TSSOP14
    Text: 74LVX27  LOW VOLTAGE TRIPLE 3-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVX27 74LVX27 74LVX27M TSSOP14

    74LVX273

    Abstract: No abstract text available
    Text: 74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original     		PDF 74LVX273 74LVX273

    74LVX27

    Abstract: No abstract text available
    Text: 74LVX27 LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


    Original     		PDF 74LVX27 74LVX27MTR 74LVX27TTR 74LVX27

    LVX273

    Abstract: 74LVX273 74LVX273M 74LVX273T P013L
    Text: 74LVX273  LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz TYP. at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V


    Original     		PDF 74LVX273 LVX273 P013L TSSOP20 74LVX273 74LVX273M 74LVX273T P013L

    LVX273

    Abstract: 74LVX273 74LVX273M 74LVX273T
    Text: 74LVX273  LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz TYP. at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V


    Original     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273T

    74LVX273

    Abstract: No abstract text available
    Text: 74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original     		PDF 74LVX273 74LVX273Mithout 74LVX273

    74LVX273

    Abstract: 74LVX273M 74LVX273MTC 74LVX273SJ LVX273 M20D MS-013 MTC20
    Text: Revised April 2005 74LVX273 Low Voltage Octal D-Type Flip-Flop General Description Features The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset


    Original     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273MTC 74LVX273SJ M20D MS-013 MTC20

    74LVX273

    Abstract: 74LVX273M 74LVX273MTC 74LVX273SJ LVX273 M20D MS-013 MTC20
    Text: Revised September 2003 74LVX273 Low Voltage Octal D-Type Flip-Flop General Description Features The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset


    Original     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273MTC 74LVX273SJ M20D MS-013 MTC20

    LVX273

    Abstract: 74LVX273 74LVX273M 74LVX273MTC 74LVX273MTCX 74LVX273MX 74LVX273SJ 74LVX273SJX M20D
    Text: LVX273 National Semiconductor & 74LVX273 Low Voltage Octal D Flip-Flop General Description Features The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset


    OCR Scan     		PDF 74LVX273 LVX273 74LVX273 bSG1125 74LVX273M 74LVX273MTC 74LVX273MTCX 74LVX273MX 74LVX273SJ 74LVX273SJX M20D

    74LVX27

    Abstract: No abstract text available
    Text: 74LVX27 LOW VOLTAGE TRIPLE 3-INPUT NOR GATE . HIGH SPEED: tpD =4.1 ns TYP. at Vcc = 3.3V . INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V . LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V


    OCR Scan     		PDF 74LVX27 74LVX27 TSS0P14

    LVX273

    Abstract: 74LVX273 74LVX273M 74LVX273MTC 74LVX273SJ M20D MTC20 DIODE SJ 98
    Text: E M IC D N D U C T O R t 74LVX273 Low Voltage Octal D Flip-Flop G eneral D escription The LVX273 has eight edge-triggered D -type flip-flops with individual D inputs and Q o u tp uts. The com m on buffered C lock CP and M aster Reset (MR) input load and reset


    OCR Scan     		PDF 74LVX273 LVX273 74LVX273 74LVX273M 74LVX273MTC 74LVX273SJ M20D MTC20 DIODE SJ 98

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R 74LVX273 Low Voltage Octal D Flip-Flop General Description The LVX273 has eight edge-triggered D-type flip-tlops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.


    OCR Scan     		PDF 74LVX273 LVX273 2314-006I

    LVX273

    Abstract: KFIR
    Text: LVX273 S 3 National ÆÆ Semiconductor 74LVX273 Low Voltage Octal D Flip-Flop General Description Features The LVX273 has eight edge-triggered D-type flip-tlops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset


    OCR Scan     		PDF LVX273 74LVX273 LVX273 KFIR

    Untitled

    Abstract: No abstract text available
    Text: A I R C H June 1993 I L D Revised March 1999 S E M [CONDUCTOR TM 74LVX273 Low Voltage Octal D-Type Flip-Flop General Description The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset


    OCR Scan     		PDF 74LVX273 LVX273

    B5011A

    Abstract: Box58090 MSC 5511 74LVX273
    Text: tSüllEB 007flflSl ^a? • NSC1 gg National ÆÆ Semiconductor January 1994 74LVX273 Low Voltage Octal D Flip-Flop General Description Features The ’ LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered


    OCR Scan     		PDF 007flflSl 74LVX273 LVX273 Cep-01451, B5011A Box58090 MSC 5511