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    74LVC3GU04GM Price and Stock

    Rochester Electronics LLC 74LVC3GU04GM,125

    IC INVERTER
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    DigiKey 74LVC3GU04GM,125 Bulk 4,000
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    Nexperia 74LVC3GU04GM,125

    IC INVERTER 3CH 3-INP 8XQFN
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    DigiKey 74LVC3GU04GM,125 Reel
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    Rochester Electronics 74LVC3GU04GM,125 4,000 1
    • 1 $0.076
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    NXP Semiconductors 74LVC3GU04GM,125

    74LVC3GU04GM - Inverter, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, PQCC8 '
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    Rochester Electronics 74LVC3GU04GM,125 12,000 1
    • 1 $0.076
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    NXP Semiconductors 74LVC3GU04GM,115

    INVERTER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 8; Package Code: VQCCN; Package Shape: SQUARE;
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    Vyrian 74LVC3GU04GM,115 332
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    NXP Semiconductors 74LVC3GU04GM

    INVERTER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 8; Package Code: VQCCN; Package Shape: SQUARE;
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    Vyrian 74LVC3GU04GM 82
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    74LVC3GU04GM Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3GU04GM NXP Semiconductors 74LVC3GU04 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PQCC8, 1.6 X 1.6 MM, 0.5 MM HEIGHT, MO-255, SOT902-1, QFN-8U, Gate Original PDF
    74LVC3GU04GM NXP Semiconductors Triple inverter Original PDF
    74LVC3GU04GM,115 NXP Semiconductors 74LVC3GU04GM - Triple inverter, SOT902-1 Package, Standard Marking, Reel Pack, SMD, 7" Original PDF
    74LVC3GU04GM,125 NXP Semiconductors Triple inverter; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF
    74LVC3GU04GM,125 NXP Semiconductors 74LVC3GU04 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT-902-1, QFN-8, Gate Original PDF

    74LVC3GU04GM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple inverter Rev. 10 — 6 July 2012 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD22-A114F JESD22-A115-A PDF

    74LVC3GU04

    Abstract: 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT JESD22-A114E MO-187 VU04
    Text: 74LVC3GU04 Triple inverter Rev. 06 — 4 March 2008 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD8B/JESD36 JESD22-A114E JESD22-A115-A 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT MO-187 VU04 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple inverter Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD22-A114F JESD22-A115-A PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple unbuffered inverter Rev. 11 — 9 April 2013 Product data sheet 1. General description The 74LVC3GU04 is a triple unbuffered inverter. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3GU04 74LVC3GU04 JESD22-A114F JESD22-A115-A PDF

    74LVC3GU04GD

    Abstract: 74LVC3GU04 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT VU04 sot833-1 marking nxp TSSOP8 package
    Text: 74LVC3GU04 Triple inverter Rev. 07 — 11 November 2009 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD8B/JESD36 JESD22-A114F JESD22-A115-A 74LVC3GU04GD 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT VU04 sot833-1 marking nxp TSSOP8 package PDF

    VU04

    Abstract: 74LVC3GU04 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT JESD22-A114E MO-187
    Text: 74LVC3GU04 Triple inverter Rev. 05 — 5 October 2007 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD8B/JESD36 JESD22-A114E JESD22-A115-A VU04 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GM 74LVC3GU04GT MO-187 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple inverter Rev. 02 — 27 October 2004 Product data sheet 1. General description The 74LVC3GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these


    Original     		74LVC3GU04 74LVC3GU04 JESD8-B/JESD36 PDF

    VU04

    Abstract: 74LVC3GU04 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GD 74LVC3GU04GM 74LVC3GU04GT MNB120
    Text: 74LVC3GU04 Triple inverter Rev. 8 — 10 November 2010 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD22-A114F JESD22-A115-A VU04 74LVC3GU04DC 74LVC3GU04DP 74LVC3GU04GD 74LVC3GU04GM 74LVC3GU04GT MNB120 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple inverter Rev. 10 — 6 July 2012 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD22-A114F JESD22-A115-A PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3GU04 Triple inverter Rev. 04 — 15 March 2007 Product data sheet 1. General description The 74LVC3GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of


    Original     		74LVC3GU04 74LVC3GU04 JESD8B/JESD36 PDF