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    74LVC3G34GM Search Results

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    74LVC3G34GM Price and Stock

    Rochester Electronics LLC 74LVC3G34GM,125

    NEXPERIA 74LVC3G34 - TRIPLE BUFF
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    DigiKey 74LVC3G34GM,125 Bulk 2,862
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    Nexperia 74LVC3G34GM,125

    IC BUFFER NON-INVERT 5.5V 8XQFN
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    DigiKey 74LVC3G34GM,125 Reel
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    74LVC3G34GM,125 Digi-Reel 1
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    74LVC3G34GM,125 Cut Tape
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    Verical 74LVC3G34GM,125 95,980 3,501
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    74LVC3G34GM,125 27,000 3,501
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    Rochester Electronics 74LVC3G34GM,125 125,375 1
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    NXP Semiconductors 74LVC3G34GM,125

    Buffer 3-CH Non-InvertingCMOS 8-Pin XQFN EP T/R
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    Verical 74LVC3G34GM,125 52,000 3,501
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    Rochester Electronics 74LVC3G34GM,125 52,000 1
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    Nexperia 74LVC3G34GM

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: BUTT; No. of Terminals: 8; Package Code: VBCC; Package Shape: SQUARE;
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    Vyrian 74LVC3G34GM 228
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    NXP Semiconductors 74LVC3G34GM,115

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: BUTT; No. of Terminals: 8; Package Code: VBCC; Package Shape: SQUARE;
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    Vyrian 74LVC3G34GM,115 94
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    74LVC3G34GM Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G34GM NXP Semiconductors 74LVC3G34 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PBCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate Original PDF
    74LVC3G34GM NXP Semiconductors Triple buffer Original PDF
    74LVC3G34GM,115 NXP Semiconductors 74LVC3G34GM - Triple buffer, SOT902-1 Package, Standard Marking, Reel Pack, SMD, 7" Original PDF
    74LVC3G34GM,125 NXP Semiconductors 74LVC3G34 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PBCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, XQFN-8, Gate Original PDF
    74LVC3G34GM,125 NXP Semiconductors Triple buffer; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF

    74LVC3G34GM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    NC7NZ34K8

    Abstract: 74LVC3G34 NC7NP34 NC7NZ34 SN74AUP3G34 SN74LVC3G34 "MARKING CODE" 3Y SN74LVC3G34DCTR
    Text: SLG74LB3G34 GreenLIBTM TRIPLE BUFFER GATE General Description Features The GreenLIB provides the triple buffer gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging


    Original     		SLG74LB3G34 000-0074LB3G34-11 NC7NZ34K8 74LVC3G34 NC7NP34 NC7NZ34 SN74AUP3G34 SN74LVC3G34 "MARKING CODE" 3Y SN74LVC3G34DCTR PDF

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT
    Text: 74LVC3G34 Triple buffer Rev. 8 — 2 September 2010 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT PDF

    diode MARKING A1 v34

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer gate Rev. 02 — 27 October 2004 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		74LVC3G34 74LVC3G34 diode MARKING A1 v34 PDF

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187
    Text: 74LVC3G34 Triple buffer Rev. 05 — 5 October 2007 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187 PDF

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187
    Text: 74LVC3G34 Triple buffer Rev. 07 — 9 May 2008 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 10 — 8 August 2012 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 JESD8B/JESD36 PDF

    *AG083

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer gate Rev. 04 — 2 March 2007 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		74LVC3G34 74LVC3G34 *AG083 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 06 — 12 March 2008 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 JESD8B/JESD36 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 11 — 2 April 2013 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		74LVC3G34 74LVC3G34 JESD8B/JESD36 PDF