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    74LVC3G06DP Search Results

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    74LVC3G06DP Price and Stock

    Nexperia 74LVC3G06DP,125

    IC INVERTER 3CH 3-INP 8TSSOP
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    DigiKey 74LVC3G06DP,125 Reel 3,000
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    Avnet Americas 74LVC3G06DP,125 Reel 4 Weeks 1,846
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    74LVC3G06DP,125 Reel 6,000
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    Mouser Electronics 74LVC3G06DP,125 2,327
    • 1 $0.58
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    Rochester Electronics 74LVC3G06DP,125 153,000 1
    • 1 $0.1976
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    TTI 74LVC3G06DP,125 Reel 6,000
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    Avnet Silica 74LVC3G06DP,125 8 Weeks 3,000
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    EBV Elektronik 74LVC3G06DP,125 8 Weeks 3,000
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    Rochester Electronics LLC 74LVC3G06DP,125

    IC INVERTER OD 3CH 3-INP 8TSSOP
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    DigiKey 74LVC3G06DP,125 Bulk 1,533
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    NXP Semiconductors 74LVC3G06DP,125

    74LVC3G06DP - Inverter, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, TSSOP8
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics 74LVC3G06DP,125 8,029 1
    • 1 $0.1976
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    • 100 $0.1857
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    74LVC3G06DP Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G06DP NXP Semiconductors Triple inverter with open-drain output Original PDF
    74LVC3G06DP Philips Semiconductors OP Amp, Triple Inverter with Open-Drain Output, Tape and Reel Original PDF
    74LVC3G06DP,125 NXP Semiconductors 74LVC3G06 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 3 MM, PLASTIC, SOT505-2, TSSOP-8, Gate Original PDF
    74LVC3G06DP,125 NXP Semiconductors Triple inverter with open-drain output - Description: Triple Inverter With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.0@3.3V ns; Voltage: 1.65 - 5.5; Package: SOT505-2 (TSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74LVC3G06DP-G NXP Semiconductors 74LVC3G06DP - Triple inverter with open-drain output - Description: Triple Inverter With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.0@3.3V ns; Voltage: 1.65 - 5.5 Original PDF
    74LVC3G06DP-G NXP Semiconductors Triple inverter with open-drain output - Description: Triple Inverter With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.0@3.3V ns; Voltage: 1.65 - 5.5 Original PDF

    74LVC3G06DP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    "MARKING CODE" 3Y

    Abstract: 74LVC3G06 74LVC3G06DC 74LVC3G06DP NL37WZ06 SN74AUP3G06 SN74LVC3G06
    Text: SLG74LB3G06 GreenLIBTM TRIPLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS General Description Features The GreenLIB provides the triple inverter buffer/driver with • Pb-Free / RoHS Compliant open-drain outputs. The output of the device is open-drain •


    Original
    PDF SLG74LB3G06 000-0074LB3G06-10 "MARKING CODE" 3Y 74LVC3G06 74LVC3G06DC 74LVC3G06DP NL37WZ06 SN74AUP3G06 SN74LVC3G06

    74LVC3G06

    Abstract: 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT JESD22-A114E MO-187
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 07 — 12 March 2009 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT JESD22-A114E MO-187

    74LVC3G06

    Abstract: 74LVC3G06DC 74LVC3G06DP 74LVC3G06GT MO-187 1.4541
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 03 — 01 February 2005 Product data sheet 1. General description The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


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    PDF 74LVC3G06 74LVC3G06 74LVC3G06DC 74LVC3G06DP 74LVC3G06GT MO-187 1.4541

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 10 — 27 June 2012 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06

    74LVC3G06

    Abstract: 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 8 — 9 August 2010 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 02 — 21 October 2004 Product data sheet 1. General description The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original
    PDF 74LVC3G06 74LVC3G06

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 04 — 2 March 2006 Product data sheet 1. General description The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original
    PDF 74LVC3G06 74LVC3G06

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 11 — 28 March 2013 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06

    74LVC3G06

    Abstract: 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT JESD22-A114E MO-187
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 06 — 3 April 2008 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06 74LVC3G06DC 74LVC3G06DP 74LVC3G06GM 74LVC3G06GT JESD22-A114E MO-187

    74LVC3G06

    Abstract: 74LVC3G06DC 74LVC3G06DP MO-187
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 01 — 7 June 2004 Product data sheet 1. General description The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original
    PDF 74LVC3G06 74LVC3G06 74LVC3G06DC 74LVC3G06DP MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 10 — 27 June 2012 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G06 Triple inverter with open-drain output Rev. 05 — 21 May 2007 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    PDF 74LVC3G06 74LVC3G06