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    74LVC109D Search Results

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    74LVC109D Price and Stock

    NXP Semiconductors 74LVC109D,112

    IC FF JK TYPE DUAL 1BIT 16SO
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    Rochester Electronics 74LVC109D,112 1,587 1
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    NXP Semiconductors 74LVC109D,118

    IC FF JK TYPE DUAL 1BIT 16SO
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    NXP Semiconductors 74LVC109DB,112

    IC FF JK TYPE DUAL 1BIT 16SSOP
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    NXP Semiconductors 74LVC109DB,118

    IC FF JK TYPE DUAL 1BIT 16SSOP
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    Rochester Electronics 74LVC109DB,118 6,000 1
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    Rochester Electronics LLC 74LVC109DB,118

    IC FF JK TYPE DUAL 1BIT 16SSOP
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    DigiKey 74LVC109DB,118 Bulk 1,776
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    Find more 74LVC109D price and stock on Findchips.com

    74LVC109D Datasheets (22)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC109D Philips Semiconductors Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger Original PDF
    74LVC109D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LVC109D Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109D Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109D,112 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT109-1 (SO16); Container: Tube Original PDF
    74LVC109D,112 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SO-16, FF/Latch Original PDF
    74LVC109D,118 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13" Original PDF
    74LVC109D,118 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SO-16, FF/Latch Original PDF
    74LVC109DB Philips Semiconductors Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger Original PDF
    74LVC109DB Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LVC109DB Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109DB Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109DB,112 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6; Package: SOT338-1 (SSOP16); Container: Tube Original PDF
    74LVC109DB,112 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF
    74LVC109DB,118 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6; Package: SOT338-1 (SSOP16); Container: Reel Pack, SMD, 13" Original PDF
    74LVC109DB,118 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF
    74LVC109DB-T NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6 Original PDF
    74LVC109DB-T NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF
    74LVC109DB-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LVC109D-T NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6 Original PDF

    74LVC109D Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N PDF

    74LVC109

    Abstract: 74LVC109A 74LVC109D 74LVC109DB 74LVC109PW SSOP16 TSSOP16 MNA860
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Apr 28 2004 Mar 18 Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger


    Original     		74LVC109 74LVC109A SCA76 R20/04/pp18 74LVC109 74LVC109D 74LVC109DB 74LVC109PW SSOP16 TSSOP16 MNA860 PDF

    74LVC109

    Abstract: No abstract text available
    Text: 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Rev. 5 — 29 November 2012 Product data sheet 1. General description The 74LVC109A is a dual positive edge triggered JK flip-flop featuring: • • • • individual J and K inputs clock CP inputs


    Original     		74LVC109 74LVC109A 74LVC109 PDF

    MC0628R

    Abstract: 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		SCYB017A T74ALVC32374 74CBTLV16211 SN74CBTD16211 SN74SSTV16859 SN74CBTLV16211GRDR SN74ALVC16245AGRDR -SN74SSTV16859GKER MC0628R 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE PDF

    5555 FAIRCHILD optocoupler

    Abstract: DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		SCYB017A A010203 5555 FAIRCHILD optocoupler DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger 74LVC109 FEATURES DESCRIPTION • Wide supply voltage range of 1.2 to 3.6 V The 74LVC1G9 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.


    OCR Scan     		74LVC109 74LVC1G9 74HC/HCT109. 74LVC109 SV00904 PDF

    74LVC109

    Abstract: 74LVC109D 74LVC109DB 74LVC109PW
    Text: Philips Semiconductors Product Specification Dual JK flip-flop with set and reset; positive-edge trigger FEATURES • • • • • • • Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A. Inputs accept voltages upto


    OCR Scan     		74LVC109 74LVC109 74HC/HCT109. 711052b 74LVC109D 74LVC109DB 74LVC109PW PDF

    74LVC109

    Abstract: 74LVC109D 74LVC109DB 74LVC109PW
    Text: Philips Semiconductors Objective Specification Dual JK flip-flop with set and reset; positive-edge trigger FEATURES • • • • • • • Wide supply voltage range of 1.2 V to 3.6 V In accordance w ith JEDEC standard no. 8-1 A. Inputs accept voltages upto


    OCR Scan     		74LVC109 74LVC109 74HC/HCT109. CI0754Ã 74LVC109D 74LVC109DB 74LVC109PW PDF

    Untitled

    Abstract: No abstract text available
    Text: Product Specification Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger FEATURES • • • • • • • Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A. Inputs accept voltages upto


    OCR Scan     		74LVC109 PDF

    74LVC109

    Abstract: 1RDD 1712J
    Text: Philips Semiconductors Product Specification Dual JK flip-flop with set and reset; positive-edge trigger FEATURES • • • • • • • Wide supply voltage range of 1.2 V to 3.6 V in accordance with JEDEC standard no. 8-1 A. Inputs accept voltages upto


    OCR Scan     		74LVC109 74LVC109 1RDD 1712J PDF