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    74LS139 DECODER Search Results

    74LS139 DECODER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    HC9P55564-5 Rochester Electronics LLC CVSD Codec, CVSD, 1-Func, PDSO16, Visit Rochester Electronics LLC Buy
    HC1-55564-9 Rochester Electronics LLC CVSD Codec, CVSD, 1-Func, CDIP14, Visit Rochester Electronics LLC Buy
    74LS139FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS139P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation

    74LS139 DECODER Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    74LS139

    Abstract: demultiplexer truth table LS 74LS139 Truth table of 1 to 16 demultiplexer LS139 74ls139 datasheet SN54/74LS139 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS139 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    Original     		SN54/74LS139 SN54/74LS139 LS139 74LS139 demultiplexer truth table LS 74LS139 Truth table of 1 to 16 demultiplexer 74ls139 datasheet SN54LSXXXJ SN74LSXXXD SN74LSXXXN PDF

    demultiplexer truth table

    Abstract: 74ls139 datasheet 74ls139 decoder SN54/74LS139 transistor motorola 236 LS139 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application
    Text: SN54/74LS139 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    Original     		SN54/74LS139 SN54/74LS139 LS139 demultiplexer truth table 74ls139 datasheet 74ls139 decoder transistor motorola 236 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application PDF

    pin diagram of ic 74ls139

    Abstract: decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74
    Text: MOTOROLA SN54/74LS139 DUAL 1-0F-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder/D e­ multiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    OCR Scan     		SN54/74LS139 LS139 pin diagram of ic 74ls139 decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74 PDF

    74ls139 decoder pin configuration

    Abstract: SP74HCT139N 74LS139 SP74HCT139J 74LS139 pin configuration with
    Text: SPI SP74HCT139 DECODER/DEMULTIPLEXER FEATURES • Designed for high performance memory decoders in microprocessor systems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with inverted outputs ■ Pin com patible with 74LS139 ■ SPI CMOS technology


    OCR Scan     		SP74HCT139 74LS139 SP74HCT139 74LS139. 20/iA 74ls139 decoder pin configuration SP74HCT139N 74LS139 SP74HCT139J 74LS139 pin configuration with PDF

    pin diagram of ic 74ls139

    Abstract: 74LS139 74LS
    Text: Signetics 74LS139, S139 Decoders/Demultiplexers Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for higher performance


    OCR Scan     		LS139 93L21 74LS139 74S139 500ns 500ns pin diagram of ic 74ls139 74LS PDF

    74LS139 pin configuration with

    Abstract: 74LS139 74ls139 decoder pin configuration 74ls139 decoder 54LS 74LS
    Text: GD54/74LS139 DUAL 2-TO-4-LINE DECODERS/DEMULTIPLEXERS Feature • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Schottky Clamped for High Performance Pin Configuration V çç SELECT DATA OUTPUTS ENABLE^_ _ _


    OCR Scan     		GD54/74LS139 74LS139 pin configuration with 74LS139 74ls139 decoder pin configuration 74ls139 decoder 54LS 74LS PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS139 DUAL 2-TO-4-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Schottky Clamped for High Performance Vçç SELECT DATA OUTPUTS ENABLE^_ _


    OCR Scan     		GD54/74LS139 PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS139 DUAL 2-TO-4-UNE DECODERS/DEMULTIPLEXERS Feature • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems • Schottky Clamped for High Performance Pin Configuration SELECT V çç 25 2A 2B DATA OUTPUTS 2VQ 2V1 2Y2


    OCR Scan     		GD54/74LS139 PDF

    pin diagram of ic 74ls139

    Abstract: LS 74LS139 74LS139 74ls139 decoder 74ls139 decoder pin configuration decoders 3*8
    Text: 7 4 LS1 3 9 , S139 Decoders/Demultiplexers S ig n e t ic s Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES TYPICAL PROPAGATION DELAY ENABLE AT 2 LOGIC LEVELS TYPICAL SUPPLY CURRENT (TOTAL) 74LS139 19ns 6.8mA 74S139 6ns 60mA


    OCR Scan     		93L21 74LS139 74S139 EnabS139 1N916, 1N3064, 500ns 500ns pin diagram of ic 74ls139 LS 74LS139 74ls139 decoder 74ls139 decoder pin configuration decoders 3*8 PDF

    LS139

    Abstract: LS138 LS138-LS139 74LS139 DM74LS139N
    Text: LS138-LS139 National Semiconductor 54 LS138/DM 54LS138/DM 74LS138, 54 LS139/DM 54LS139/DM 74LS139 Decoders/Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­


    OCR Scan     		LS138-LS139 LS138/DM 54LS138/DM 74LS138, LS139/DM 54LS139/DM 74LS139 LS138 LS139 LS138-LS139 DM74LS139N PDF

    Untitled

    Abstract: No abstract text available
    Text: H D 74LS139. Dual 2-line-to-4-line Decoders/Demultiplexers IPIN ARRANGEMENT The HD74LS139 comprises two individual two-line-to-fourline decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications. IBLOCK DIAGRAM


    OCR Scan     		HD74LS139. HD74LS139 T-90-10 ib203 PDF

    SP74SC139N

    Abstract: 74ls139 decoder pin configuration 74LS139 SP74SC139F E332A
    Text: / SP74SC139 DECODER/DEMULTIPLEXER PIN CO NFIGURATIO N 1G [ T v cc 1A [T Ï3 2G FEATURES • Designed for high performance memory decoders in microprocessor sytems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with inverted outputs ■ Pin compatible with 74LS139


    OCR Scan     		SP74SC139 74LS139 SP74SC139 74LS139. SP74SC139N 74ls139 decoder pin configuration 74LS139 SP74SC139F E332A PDF

    ATML U 010

    Abstract: ATML H 010 1S2074 400M 74LSOO HD74LS139 OG-16 L400M ATML 010
    Text: H D 74LS139. Dual 2-line-to-4-line Decoders/Demultiplexers IPIN ARRANGEMENT The H D74LS139 comprises two individual two-line-to-fourline decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications. IBLOCK DIAGRAM


    OCR Scan     		HD74LS139 QQ14CI14 DG-14 06max 20-IU8 OG-16 DG-24 ATML U 010 ATML H 010 1S2074 400M 74LSOO OG-16 L400M ATML 010 PDF

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series DN74LS139 DN74LS139 Dual 2 -lin e to 4 -lin e Decoders / Demultiplexers H Description P -2 D N 74LS139 contains tw o 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable input term inals. • Features


    OCR Scan     		DN74LS DN74LS139 74LS139 16-pin PDF

    74LS139

    Abstract: 74l513 demultiplexer 74ls 74ls signetics pin diagram of 74LS 74LS 74S139 93L21 N74LS139D N74LS139N
    Text: 74LS139, S139 Signetics Decoders/Demultiplexers Dual 1-of-4 D e c o d e r/D e m u ltip le x e r Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for


    OCR Scan     		93L21 74LS139, TYPICS139, 1N916, 1N3064, 500ns 74LS139 74l513 demultiplexer 74ls 74ls signetics pin diagram of 74LS 74LS 74S139 N74LS139D N74LS139N PDF

    D133

    Abstract: 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 D133 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132 PDF

    pin diagram decoder 74154

    Abstract: 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 pin diagram decoder 74154 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133 PDF

    Untitled

    Abstract: No abstract text available
    Text: 139 139 CONNECTION DIAGRAM PINOUT A // 54S/74S139 d / 6 b c \/54LS/74LS139 6 i o ^ ' f ° 7 DUAL 1-0F-4 DECODER D E S C R IP TIO N — The ’139 is a high speed dual 1-of-4 decoder/dem ultiplexer. The device has tw o independent decoders, each accepting tw o inputs


    OCR Scan     		54S/74S139 \/54LS/74LS139 54/74LS 54/74S PDF

    74LS139

    Abstract: M16A M16D MM74HC139 MM74HC139M MM74HC139MTC MM74HC139SJ MTC16 diode D254
    Text: Revised February 1999 E M IC O N D U C T O R T M MM74HC139 Dual 2-To-4 Line Decoder General Description equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and T he M M 74H C 139 d ecoder utilizes advanced silicon-gate


    OCR Scan     		MM74HC139 MM74HC139 74LS139 M16A M16D MM74HC139M MM74HC139MTC MM74HC139SJ MTC16 diode D254 PDF

    74191 8 bit

    Abstract: D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21 PDF

    pin diagram of 74LS191

    Abstract: TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 pin diagram of 74LS191 TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram PDF

    transistor d133

    Abstract: Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 transistor d133 Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491 PDF

    7448 decoder

    Abstract: ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 G N D = Pin 8 Vcc = Pin 16 G N D = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 7448 decoder ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448 PDF

    74HC139M

    Abstract: 74hc139n
    Text: A s e m I R C i c o n H d u S eptem ber 1983 I L D Revised February 1999 c t o r MM74HC139 Dual 2-To-4 Line Decoder equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and General Description The M M 74H C 139 deco d e r utilizes advanced silicon-gate


    OCR Scan     		MM74HC139 74HC139M 74hc139n PDF