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    74LS00 PIN Search Results

    74LS00 PIN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet
    CS-DSDMDB37MM-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB37MM-002.5 37-Pin (DB37) Deluxe D-Sub Cable - Copper Shielded - Male / Male 2.5ft Datasheet

    74LS00 PIN Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    lm294oct

    Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
    Text: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12


    Original     		74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 lm294oct d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C PDF

    TTL 74HC00

    Abstract: 74LS00 TTL TTL 74ls00 74LS00 gate diagram 74ls00 74LS00 function table pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. GD74HCT00 GD54HCT00 D0Q457Q TTL 74HC00 74LS00 TTL TTL 74ls00 74LS00 gate diagram 74ls00 74LS00 function table pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. PDF

    74LS00 function table

    Abstract: pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400
    Text: Signelics | 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 74LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9.5ns 1.6mA 3ns 15mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C


    OCR Scan     		74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74SOOD 74LS00 function table pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400 PDF

    74LS00 pin configuration

    Abstract: gd74ls04 74LS00 function table 74LS00 pin configuration 74LS00 74LS00 Electrical and Switching characteristics 74LS04 NOT gate GD74LSOO 74LS00 clock frequency pin configuration 74LS04
    Text: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates, jt^ performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3Y 1B tY 2A 2B 2Y GND Function Table each gate


    OCR Scan     		GD54/74LS00 GD74LSOO GD74LS04 74LS04 74LS00 pin configuration gd74ls04 74LS00 function table 74LS00 pin configuration 74LS00 74LS00 Electrical and Switching characteristics 74LS04 NOT gate GD74LSOO 74LS00 clock frequency pin configuration 74LS04 PDF

    74LS324

    Abstract: 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent
    Text: N T E ELECTRONICS INC 17E H ^3125=1 G0G513S Q B - o S V. ! - TRANSISTOR-TRANSISTOR LOGIC INCLUDES SERIES 74C CMOS NTE TYPE NO. •DESCRIPTION . 7214 7400 74C00 74H00 74LS00 74S00 3-State Sel/Mlpx Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos


    OCR Scan     		G0G513S 74C00 74H00 74LS00 74S00 74H01 74LS01 74C02 74LS02 74S02 74LS324 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent PDF

    74LS00 clock frequency

    Abstract: 74LS00 function table pin configuration 74LS00
    Text: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. K performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 14 13 12 11 10 9 3Y 8 lIoJ lioJ


    OCR Scan     		GD54/74LS00 D74LS00 D74LS04 74LS00 clock frequency 74LS00 function table pin configuration 74LS00 PDF

    CI 74LS00

    Abstract: CI 7400 74LS00 7400 74S00 7400 pin configuration 7400 fan-out 74LS00 fan-out 74ls00 N7400N 74H00 S5400F
    Text: 54/7400 54H/74H00 54S/74S00 54LS/74LS00 ORDERING CODE PACKAGES PIN CONF. PIN CONFIGURATIONS See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES vcc = 5V ± 5%; T a = 0"C to *70°C Plastic DIP Fig. A Fig. A N7400N N74S00N


    OCR Scan     		54H/74H00 54S/74S00 54LS/74LS00 N7400N N74H00N N74S00N N74LS00N N7400F N74H00F N74S00F CI 74LS00 CI 7400 74LS00 7400 74S00 7400 pin configuration 7400 fan-out 74LS00 fan-out 74ls00 N7400N 74H00 S5400F PDF

    IC 74LS00

    Abstract: 74LS00 74LS00 pin configuration 74LS00 function table pin configuration 74LS00 NAND 74LS00 74LS00 clock frequency 74LS00 Electrical and Switching characteristics 74LS00 application 74ls00 NAND gate
    Text: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3Y 14 13 12 11 10 9 8 Function Table each gate


    OCR Scan     		GD54/74LS00 402B757 IC 74LS00 74LS00 74LS00 pin configuration 74LS00 function table pin configuration 74LS00 NAND 74LS00 74LS00 clock frequency 74LS00 Electrical and Switching characteristics 74LS00 application 74ls00 NAND gate PDF

    74LS00P

    Abstract: 74LS00 pinout 74LS00 fan-out 74LS00 7400 74S00 7400 fan-out 74LS00PC 7400PC 74LS00 74LS00D 74LS00DC
    Text: 00 CO NNECTIO N DIAGRAMS PINOUT A 54/7400 ^ o n et* 54H /74H 00Ä eU9 5 4 S /7 4 S 0 0 ^' /V 54LS/74LS00^'/ bUi QUAD 2-INPUT NAND GATE ORDERING CODE: See Section 9 CO M M ERCIAL GRADE PIN PKGS Vcc = +5.0 V ±5%, = 0° C to +70° C OUT M ILITARY GRADE Vcc = +5.0 V ±10%,


    OCR Scan     		54H/74H00 54S/74S00 54LS/74LS00^ 54/74H 54/74S 54/74LS 7400PC, 74H00PC 74LS00PC, 74S00PC 74LS00P 74LS00 pinout 74LS00 fan-out 74LS00 7400 74S00 7400 fan-out 74LS00PC 7400PC 74LS00 74LS00D 74LS00DC PDF

    74LS00 truth table

    Abstract: 74LS00 Electrical and Switching characteristics LC74HC00
    Text: SANYO SEMICONDUCTOR CORP 1EE D I 7 cn7D7ti f-ÿ ï'-'ü 3003A CM O S High-Speed Standard Logic LC74HC Senes Quad 2-Input N A N D Gate 1 6738 Features • The LC74HC00 consists of 4 identical 2-input NAND gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL (74LS00 with the


    OCR Scan     		LC74HC LC74HC00 74LS00) 54LS/74LS LC74HC00 74LS00 truth table 74LS00 Electrical and Switching characteristics PDF

    7400 signetics

    Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
    Text: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E


    OCR Scan     		74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul 7400 signetics 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL PDF

    74LS00 CMOS

    Abstract: 74LS00 gate diagram 74LS00 circuit diagram with voltage ttl 74ls00 series 74LS00 pinout CMOS 74LS00 74LS00 gate diagram nand 74LS00 74LS00 QUAD 2-INPUT NAND GATE pin diagram of 74ls00
    Text: S AN YO SEMICONDUCTOR CORP 1EE. D I 7 cn 7 0 7 b QODBS^ T -m -zi ¡•HlBl C M O S High-Speed Standard Logic LC74HC Series 3034 A , Quad 2-Input NAND Gate 21 3 8A • Features • The L C 7 4 H C 0 0 M consists o f 4 identical 2-input N A N D gates. • Uses C M O S silicon gate process technology to achieve operating speeds sim ilar to L S -T T L (74LS00 w ith the


    OCR Scan     		7cH707ki LC74HC00WB LC74HC LC74HC00M 74LS00) 54LS/74LS Tas85Â 10sec LC74HC00M) 74LS00 CMOS 74LS00 gate diagram 74LS00 circuit diagram with voltage ttl 74ls00 series 74LS00 pinout CMOS 74LS00 74LS00 gate diagram nand 74LS00 74LS00 QUAD 2-INPUT NAND GATE pin diagram of 74ls00 PDF

    ls 7400

    Abstract: 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table
    Text: Signetìcs I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TY PE T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU P P LY C U R R E N T TO T A L 9ns 8m A 74LS00 9.5ns 1.6mA 74SOO 3ns 15m A 7400 ORDERING CODE C O M M E R C IA L RA NG E


    OCR Scan     		74LS00 74SOO N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul WF07570S ls 7400 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table PDF

    datasheet of ic 74ls00

    Abstract: pin diagram of ic 74ls00 pin diagram of 74ls00 motorola 74LS00 74LS00 74HC74 decoder 74HC74 inverter wait 74LS00 impedance 74LS00 application
    Text: Freescale Semiconductor, Inc. PCMCIA RELEASE 2.0 INTERFACE BOARD FOR DRAGONBALL UPDATE DATE : 24 NOV 98 DTACK GENERATOR Freescale Semiconductor, Inc. The DTACK Generator is a state machine. It delays the memory or I/O access cycle of the PC Card when the card asserts the *WAIT signal.


    Original     		0xfff44b 0xfff449 0xfff448 0xfff443 0xfff441 0xfff440 datasheet of ic 74ls00 pin diagram of ic 74ls00 pin diagram of 74ls00 motorola 74LS00 74LS00 74HC74 decoder 74HC74 inverter wait 74LS00 impedance 74LS00 application PDF

    pin diagram of 74ls00

    Abstract: 74HC04 74HC74 74LS00 74LS00 impedance 74ls00 circuit diagram 74LS00 application motorola 74LS00 74HC74 decoder inverter wait
    Text: Freescale Semiconductor, Inc. PCMCIA RELEASE 2.0 INTERFACE BOARD FOR DRAGONBALL UPDATE DATE : 24 NOV 98 DTACK GENERATOR ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Freescale Semiconductor, Inc. The DTACK Generator is a state machine. It delays the memory or I/O access cycle of the


    Original     		Informatfff448 0xfff443 0xfff441 0xfff440 0xfff44b 0xfff449 0xfff448 pin diagram of 74ls00 74HC04 74HC74 74LS00 74LS00 impedance 74ls00 circuit diagram 74LS00 application motorola 74LS00 74HC74 decoder inverter wait PDF

    pin diagram of 74ls00

    Abstract: 74LS00 74ls00 datasheet 74HC74 motorola 74LS00 74HC74 decoder inverter wait memory card circuit diagram 74HC240 74LS00 impedance
    Text: PCMCIA RELEASE 2.0 INTERFACE BOARD FOR DRAGONBALL UPDATE DATE : 24 NOV 98 DTACK GENERATOR The DTACK Generator is a state machine. It delays the memory or I/O access cycle of the PC Card when the card asserts the *WAIT signal. The state diagram is shown in Figure 0-1


    Original     		74HC04 0xfff44b 0xfff449 0xfff448 0xfff443 0xfff441 0xfff440 pin diagram of 74ls00 74LS00 74ls00 datasheet 74HC74 motorola 74LS00 74HC74 decoder inverter wait memory card circuit diagram 74HC240 74LS00 impedance PDF

    TTL SN 54S00

    Abstract: No abstract text available
    Text: SN5400, SN54LS00, SIU54S00, SN7400, SN74LS00, SN74S00 QUADRUPLE 2 INPUT POSITIVE NAND GATES D E C E M B E R 1 9 8 3 - R E V IS E D M A R C H 1 988 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic


    OCR Scan     		SN5400, SN54LS00, SIU54S00, SN7400, SN74LS00, SN74S00 54LS00, 54S00 74LS00, 74S00 TTL SN 54S00 PDF

    t74ls157

    Abstract: 74LS00 fan out 74LS00E T74LS74 74LS00 QUAD 2-INPUT NAND GATE 74LS00 74LS00 nand gate NAND 74LS00 74ls00 series T74LS367
    Text: LOW POWER SCHOTTKY TTL-54/74 LS SERIES DESIGN CO NSIDERATIO NS SUPPLY VOLTAGE — +5V ±10% +5V ±5% T54 SERIES T74 SERIES NOISE MARGIN — V il 0.7V, V il 0.8V, 2.0V, 2 .0 V, V ih V ih Vol Vol 0.4V, V o h 2.5V 0.5V, V oh 2.7V T 5 4 SERIES T 7 4 SERIES INPUT LOADING —


    OCR Scan     		TTL-54/74 74LS00 400/u 400mA SO-14. t74ls157 74LS00 fan out 74LS00E T74LS74 74LS00 QUAD 2-INPUT NAND GATE 74LS00 nand gate NAND 74LS00 74ls00 series T74LS367 PDF

    74LS688

    Abstract: s1d13502 isa bus 74LS00 DATA AB-019
    Text: S5U13502 Dot Matrix Graphics LCD Controller ISA Bus Interface Considerations Document Number: X16-AN-003-06 Copyright 1995, 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in


    Original     		S5U13502 X16-AN-003-06 1100000000b 1100000001b MC68K 16-bit S1D13502 74LS688 s1d13502 isa bus 74LS00 DATA AB-019 PDF

    74ls163 function table

    Abstract: No abstract text available
    Text: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs


    OCR Scan     		GD54/74LS163A 000424G 74ls163 function table PDF

    IC 74LS00

    Abstract: 74LS00 gate diagram 74LS00 74LS00W
    Text: S ANYO SEMICONDUCTOR CORP 1EE. D I 7 cn 7 0 7 b QODBS^ T-Hi.-2-l ¡• H lB l ’ C M O S High-Speed Standard Logic LC74HC Series 3034 A , Quad 2-Input NAND Gate 21 3 8A • Features • The L C 7 4 H C 0 0 M consists o f 4 identical 2-input N A N D gates.


    OCR Scan     		n707b LC74HC 74LS00) 10sec 5306KI/4106KI IC 74LS00 74LS00 gate diagram 74LS00 74LS00W PDF

    schematic diagram brushless motor control

    Abstract: schematic diagram Permanent Magnet brushless DC m permanent magnet synchronous machine ST52X301 schematic diagram Permanent Magnet brushless DC jps inverter Speed Control Of DC Motor Using Fuzzy Logic code stepping motor japan servo brushless speed control of dc motor using fuzzy logic controller motor control inverter schematic diagram
    Text: AN1113 APPLICATION NOTE Brushless Motor Fuzzy Control by using ST52x301 Authors: G. Grasso, M. Di Guardo INTRODUCTION Brushless DC motors BLDC are becoming widely used in the field of control motors. These kind of synchronous motors are used as servo drives in applications such as computer peripherals equipment, robotics, and as adjustable-speed drives in load-proportional capacity-modulated heat pumps, large fans ,


    Original     		AN1113 ST52x301 schematic diagram brushless motor control schematic diagram Permanent Magnet brushless DC m permanent magnet synchronous machine ST52X301 schematic diagram Permanent Magnet brushless DC jps inverter Speed Control Of DC Motor Using Fuzzy Logic code stepping motor japan servo brushless speed control of dc motor using fuzzy logic controller motor control inverter schematic diagram PDF

    TIGER560C

    Abstract: TigerJet Network tigerjet 74LS00 clock frequency 74LS00 MSM7602
    Text: Tiger560C Application Note Long-Fame PCM interface for Tiger560C Tiger560C’s PCM bus is fully compatible to standard GCI spec. For long-frame PCM interface such as OKI’s echo cancellation chip, MSM7602 , external logic is required to generate the clock.


    Original     		Tiger560C Tiger560C MSM7602) TigerJet Network tigerjet 74LS00 clock frequency 74LS00 MSM7602 PDF