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    74S00 Search Results

    74S00 Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    SN74S00D Texas Instruments Quad 2-input positive-NAND gates 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74S00N Texas Instruments Quad 2-input positive-NAND gates 14-PDIP 0 to 70 Visit Texas Instruments Buy
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    74S00 Price and Stock

    Rochester Electronics LLC SN74S00D

    IC GATE NAND 4CH 2-INP 14SOIC
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    Rochester Electronics LLC SN74S00NS

    IC GATE NAND
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    Rochester Electronics LLC SN74S00NSR

    IC GATE NAND 4CH 2-INP 14SO
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    Rochester Electronics LLC SN74S00N

    IC GATE NAND 4CH 2-INP 14DIP
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    Rochester Electronics LLC SN74S00DR

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey SN74S00DR Bulk 2,500 386
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    74S00 Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74S00 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74S00 Unknown QUAD 2-INPUT NAND GATE Scan PDF
    74S00 Signetics Quad 2-INPUT NAND Gate Scan PDF
    74S00 Signetics Quad Two-Input NAND Gate Scan PDF
    74S00 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S00DC Fairchild Semiconductor QUAD 2-INPUT NAND GATE Scan PDF
    74S00FC Fairchild Semiconductor QUAD 2-INPUT NAND GATE Scan PDF
    74S00PC Fairchild Semiconductor QUAD 2-INPUT NAND GATE Scan PDF

    74S00 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, 74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and


    Original     		PDF SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025B SN5400

    SN74LS00N

    Abstract: SN7400N SN74LS00P SN54S00J SN54LS00J SN5400J SN74LS00J
    Text: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, 74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and


    Original     		PDF SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025B SN5400 SN54S00 SN74LS00N SN7400N SN74LS00P SN54S00J SN54LS00J SN5400J SN74LS00J

    Rakon TXO200B

    Abstract: RA2 GPS ANTENNA DFC21R57P002HHA RAKON TXO200B 25 MHZ 74 series TTL NOT gate ndk 50MHz NDK America Passive GPS ceramic patch antenna rakon Rakon TXO
    Text: GP2000 GPS Receiver Hardware Design Application Note AN4855 ISSUE 2.0 October 1999 This Applications note should be used in conjunction with the following literature available from www.zarlink.com Part No GP2010 GP2015 GP2021 P60ARM-B GPS Orion Description


    Original     		PDF GP2000 AN4855 GP2010 GP2015 GP2021 P60ARM-B ARM60-B DS4056 DS4374 DS4077 Rakon TXO200B RA2 GPS ANTENNA DFC21R57P002HHA RAKON TXO200B 25 MHZ 74 series TTL NOT gate ndk 50MHz NDK America Passive GPS ceramic patch antenna rakon Rakon TXO

    7400 signetics

    Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
    Text: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E


    OCR Scan     		PDF 74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul 7400 signetics 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL

    74S00

    Abstract: ScansUX1001
    Text: FAIRCHILD SUPER HIGH SPEED TTL/SSI • 9S00/54S00, 74S00 QUAD 2-INPUT NAND GATE LOGIC AND CONNECTION DIAGRAM SCHEMATIC DIAGRAM DIP TOP VIEW (EACH GATE) V c c _ _ ' i£J L£>i üjyjLIJLilLÜLàJUJ GND Positive logic: Y = AB RECOMMENDED OPERATING CONDITIONS


    OCR Scan     		PDF 9S00/54S00, 74S00 9S00X M/54S00X 9S00XC/74S00XC ScansUX1001

    74LS324

    Abstract: 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent
    Text: N T E ELECTRONICS INC 17E H ^3125=1 G0G513S Q B - o S V. ! - TRANSISTOR-TRANSISTOR LOGIC INCLUDES SERIES 74C CMOS NTE TYPE NO. •DESCRIPTION . 7214 7400 74C00 74H00 74LS00 74S00 3-State Sel/Mlpx Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos


    OCR Scan     		PDF G0G513S 74C00 74H00 74LS00 74S00 74H01 74LS01 74C02 74LS02 74S02 74LS324 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent

    74LS00 function table

    Abstract: pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400
    Text: Signelics | 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 74LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9.5ns 1.6mA 3ns 15mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C


    OCR Scan     		PDF 74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74SOOD 74LS00 function table pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400

    74LS00 7400 74S00

    Abstract: 74LS04 74LS04 NOT gate 74LS00 74LSoo 74H04 74H00 TTL 74ls00 TTL 7404 TTL 74ls04
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D1 9016, 9S04, 54/7404, 54H/74H04, 54S/74S04, 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/7414, 54LS/74LS14, 54/7416 D2 9002, 54/7400, 54H/74H00, 54S/74S00, 54LS/74LS00, 9012,


    OCR Scan     		PDF 54H/74H04, 54S/74S04, 54LS/74LS04, 9S05A, 54H/74H05, 54S/74S05, 54L8/74LS05, 54LS/74LS14, 54H/74H00, 54S/74S00, 74LS00 7400 74S00 74LS04 74LS04 NOT gate 74LS00 74LSoo 74H04 74H00 TTL 74ls00 TTL 7404 TTL 74ls04

    IC 7404 7406

    Abstract: 74LS00 7400 74S00 IC TTL 74LS00 ic 7404 74LS04 Hex Inverter Gates ic 74132 TTL 74h04 Fairchild 9002 ic 7404 fairchild 74LS132
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D1 9016, 9S04, 54/7404, 54H/74H04, 54S/74S04, 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/7414, 54LS/74LS14, 54/7416 D2 9002, 54/7400, 54H/74H00, 54S/74S00, 54LS/74LS00, 9012,


    OCR Scan     		PDF 54H/74H04, 54S/74S04, 54LS/74LS04, 9S05A, 54H/74H05, 54S/74S05, 54L8/74LS05, 54LS/74LS14, 54H/74H00, 54S/74S00, IC 7404 7406 74LS00 7400 74S00 IC TTL 74LS00 ic 7404 74LS04 Hex Inverter Gates ic 74132 TTL 74h04 Fairchild 9002 ic 7404 fairchild 74LS132

    74S00

    Abstract: S 74S00
    Text: GD54/74S00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3V 14 13 12 11 10 9 8 LEq J


    OCR Scan     		PDF GD54/74S00 74S00 S 74S00

    74LS00D

    Abstract: 74S00N 74LS00DN 74LS00N specification of 74ls00 7400 signetics TTL 74S00D 74LS00 fan-out 7400n 7400 quad NAND pin configuration
    Text: Signetics 1 74 0 0 , Lsoo, soo Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 7 4 LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9 .5 n s 1 .6 m A 3ns 15m A ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C


    OCR Scan     		PDF 74S00 7400N 74S00N 74LS00D 74S00D WF07570S 74LS00D 74LS00DN 74LS00N specification of 74ls00 7400 signetics TTL 74S00D 74LS00 fan-out 7400n 7400 quad NAND pin configuration

    TTL 7404

    Abstract: 7404 TTL TTL 7401 nand ttl 7400 TTL 741 TTL 7414 74IS244 CI 74LS04 TTL 7400 CI 74LS00
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D1 9016, 9S04, 54/7404, 54H/74H04, 54S/74S04, 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/7414, 54LS/74LS14, 54/7416 D2 9002, 54/7400, 54H/74H00, 54S/74S00, 54LS/74LS00, 9012,


    OCR Scan     		PDF 54H/74H04, 54S/74S04, 54LS/74LS04, 9S05A, 54H/74H05, 54S/74S05, 54L8/74LS05, 54LS/74LS14, 54H/74H00, 54S/74S00, TTL 7404 7404 TTL TTL 7401 nand ttl 7400 TTL 741 TTL 7414 74IS244 CI 74LS04 TTL 7400 CI 74LS00

    CI 74LS00

    Abstract: CI 7400 74LS00 7400 74S00 7400 pin configuration 7400 fan-out 74LS00 fan-out 74ls00 N7400N 74H00 S5400F
    Text: 54/7400 54H/74H00 54S/74S00 54LS/74LS00 ORDERING CODE PACKAGES PIN CONF. PIN CONFIGURATIONS See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES vcc = 5V ± 5%; T a = 0"C to *70°C Plastic DIP Fig. A Fig. A N7400N 74S00N


    OCR Scan     		PDF 54H/74H00 54S/74S00 54LS/74LS00 N7400N N74H00N N74S00N N74LS00N N7400F N74H00F N74S00F CI 74LS00 CI 7400 74LS00 7400 74S00 7400 pin configuration 7400 fan-out 74LS00 fan-out 74ls00 N7400N 74H00 S5400F

    74S00 TTL

    Abstract: 54S112 54s350 54S35
    Text: SCHOTTKYTTL 1» SIGNETICS INTEGRATED CIRCUITS 54S00 Series 74S00 Series The 54S00/74S00 series of product is fabricated with a non­ s a tu ra tin g S c h o ttk y cla m p e d transistor technique. This family of TTL product consists of very high performance and high power


    OCR Scan     		PDF 54S00 74S00 54S00/74S00 24-LEAD 20-LEAD 54S253/E 54S257/E 54S258/E 54S260/C 74S00 TTL 54S112 54s350 54S35

    TTL 7410

    Abstract: TTL 7401 TTL 7420 IC TTL 74LS00 TTL 7404 fairchild 9016 74LS00 TTL TTL 74LS04 TTL 7400 fairchild 7400 ecl inverter TTL 74h04
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D1 9016, 9S04, 54/7404, 54H/74H04, 54S/74S04, 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/7414, 54LS/74LS14, 54/7416 D2 9002, 54/7400, 54H/74H00, 54S/74S00, 54LS/74LS00, 9012,


    OCR Scan     		PDF 54H/74H04, 54S/74S04, 54LS/74LS04, 9S05A, 54H/74H05, 54S/74S05, 54L8/74LS05, 54LS/74LS14, 54H/74H00, 54S/74S00, TTL 7410 TTL 7401 TTL 7420 IC TTL 74LS00 TTL 7404 fairchild 9016 74LS00 TTL TTL 74LS04 TTL 7400 fairchild 7400 ecl inverter TTL 74h04

    74S206

    Abstract: 74s201
    Text: 54/74S ELECTRICAL CHARACTERISTICS See Notes - Page 50 INPUT VOLTAGE V|L (V) PARAMETER TEST CONDITIONS LOW LEVEL VÇC~MIN MIN TYP MAX OUTPUT VOLTAGE V|C(V) V|H (V) HIGH LEVEL CLAMP VOLTAGE V çç= M IN VCC = “ IN l|=-18 mA MIN TYP MAX MIN TYP VOH (V) HIGH LEVEL


    OCR Scan     		PDF 54/74S 54/74S00 54/74S02 54/74S03 54/74S04 54/74S05 54/74S260 54/74S280 54/74S301 74S206 74s201

    dy 255

    Abstract: 74s405 H R C M F 2J 225 Fairchild 9960 nixie driver 9614 line driver ci 8602 gn block diagram FJH211 Fairchild msi cul9960 variable frequency circuit diagram using IC 555
    Text: IN THE, BOSTON - 6 17- 4 4 * A SUBSIDiA) ./ OF DUCOMMUN INCORPOfiATED S, MASS vw . JU N E 1 97 S Fairchild Semiconductor TTL Data Book Contents And Section Selector If you know the correct 5400, 7400, 9300 or 9600 device type number, find the correct page in the


    OCR Scan     		PDF

    27s25

    Abstract: AM27S25 am9517 ck 6112 Z8000
    Text: Am6112 12-Bit High-Speed ADC INTRODUCTION OPERATION The Am 6112 is a m onolithic m icroprocessor com patible 12-bit high-speed Analog-to-Digital Converter ADC . A typical conversion tim e ot 6 us allows its use in applica­ tions previously requiring much m ore costly m ultichip


    OCR Scan     		PDF Am6112 12-Bit Am6112, 74S04 27s25 AM27S25 am9517 ck 6112 Z8000

    TTL LS 7400

    Abstract: ttl 7400 marking WV1 transistor TTL 7400 national semiconductor 74H Logic Family Specifications IC 7400 nand gate MIL-STD-806B LS TTL family characteristics transistor f259 internal structure 74LS00 nand gate
    Text: Introduction National Semiconductor Introduction FAST, an acronymn for Fairchild Advanced Schottky TTL, is a high-speed, low-power logic family that achieves speeds typically 30% faster than the Schottky family with a corre­ sponding power reduction of approximately 75%. It is fabri­


    OCR Scan     		PDF

    74LS00P

    Abstract: 74LS00 pinout 74LS00 fan-out 74LS00 7400 74S00 7400 fan-out 74LS00PC 7400PC 74LS00 74LS00D 74LS00DC
    Text: 00 CO NNECTIO N DIAGRAMS PINOUT A 54/7400 ^ o n et* 54H /74H 00Ä eU9 5 4 S /7 4 S 0 0 ^' /V 54LS/74LS00^'/ bUi QUAD 2-INPUT NAND GATE ORDERING CODE: See Section 9 CO M M ERCIAL GRADE PIN PKGS Vcc = +5.0 V ±5%, = 0° C to +70° C OUT M ILITARY GRADE Vcc = +5.0 V ±10%,


    OCR Scan     		PDF 54H/74H00 54S/74S00 54LS/74LS00^ 54/74H 54/74S 54/74LS 7400PC, 74H00PC 74LS00PC, 74S00PC 74LS00P 74LS00 pinout 74LS00 fan-out 74LS00 7400 74S00 7400 fan-out 74LS00PC 7400PC 74LS00 74LS00D 74LS00DC

    MH1SS1

    Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
    Text: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik


    OCR Scan     		PDF

    sidewinder force feedback

    Abstract: micro servo 9g how to control sidewinder force feedback 2 7406 ic IC LM319 IC 74LS04 LMS 7805 ic LM339 5BA DIODE IC 74LS02
    Text: Maintenance Manual CORPORATION SIDEWINDER Va" Streaming Cartridge Tape Drive M A IN TEN A N C E M A N U A L PART NUMBER 20109—001B COPYRIGHT 1982 ARCHIVE CORPORATION MAINTENANCE MANUAL SIDEWINDER TABLE OF CONTENTS Paragraph Title CHAPTER 1.1 1.2 1.2.1 1.2.2


    OCR Scan     		PDF 20109--001B A3-14. A3-18 sidewinder force feedback micro servo 9g how to control sidewinder force feedback 2 7406 ic IC LM319 IC 74LS04 LMS 7805 ic LM339 5BA DIODE IC 74LS02

    TTL LS 7406

    Abstract: el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I Vcc E RRRRRRRFl LiJ ikj Lil l±J UJ LsJ IzJ GND LU D11


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7406 el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405

    D 8243 HC

    Abstract: SO3A 6164 ram rb1-e N74S00 ITT301 N74S04 B177 55604A CD 5888
    Text: Signetics Integrated Circuits Schottky T T L Schottky T T L 74S Series Introduction S c h o ttk y T T L uses a d io d e cla m p design to ensure th e highest speed possible at T T L lo g ic levels ty p ic a lly 3ns gate p ro p a g a tio n de la y and 9 0 M H z f lip f lo p to g gle rate. H o w ever th e y rem ain c o m p a tib le w ith


    OCR Scan     		PDF N74S00N 55376D N74S02N 55377B N74S03N 55378X N74S04N 55379R N74S05N 5380A D 8243 HC SO3A 6164 ram rb1-e N74S00 ITT301 N74S04 B177 55604A CD 5888