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    74LS GATES Search Results

    74LS GATES Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TLP5702H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TLP5705H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    GT30J110SRA Toshiba Electronic Devices & Storage Corporation IGBT, 1100 V, 60 A, Built-in Diodes, TO-3P(N) Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    74LS GATES Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    octal Bilateral Switches

    Abstract: MM74HC14M MM74HC138M CD4025BCM MM74HC00M MM74HC74AM MM74HC125M MM74HC04M cd4046bcm cd4052bcm
    Text: 1/3 CMOS LOGIC MM74HC SERIES MM74HCT/U SERIES • HIGH SPEED CMOS TECHNOLOGY, CMOS DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES Part Number Description • HIGH SPEED CMOS TECHNOLOGY, TTL DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES SQP £ ea. Gates & Inverters


    Original     		PDF MM74HC MM74HC00M MM74HC02M MM74HC04M MM74HC08M MM74HC14M MM74HC32M MM74HC86M MM74HC132M MM74HC74AM octal Bilateral Switches MM74HC138M CD4025BCM MM74HC125M cd4046bcm cd4052bcm

    lm294oct

    Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
    Text: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12


    Original     		PDF 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 lm294oct d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C

    IC 74LS14

    Abstract: 74ls14 74LSxx ic 74ls13
    Text: M OTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The S N 54LS /74LS 13 and SN 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    OCR Scan     		PDF /74LS SN54/74LS13 SN54/74LS14 IC 74LS14 74ls14 74LSxx ic 74ls13

    74LS14 not gate

    Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
    Text: MOTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN 54LS /74LS 13 and S N 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    OCR Scan     		PDF SN54LS/74LS13 SN54LS/74LS14 SN54/74LS13 SN54/74LS14 74LS14 not gate 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13

    20-PIN

    Abstract: M74LS37P
    Text: MITSUBISHI LSTTLs M 74LS 37P Q U A D RU PLE 2-IN P U T P O S IT IV E NAND B U FFER DESCRIPTION The M 74LS 37P is a semiconductor integrated circuit PIN CONFIGURATION TOP VIEW containing four 2-in p u t positive N A N D and negative NOR buffer gates. FEATURES


    OCR Scan     		PDF M74LS37P M74LS37P b2LHfl27 0013Sbl 14-PIN 16-PIN 20-PIN

    74LS18P

    Abstract: No abstract text available
    Text: MITSUBISHI LSTTLs M 74LS 18P DUAL 4-IN P U T NAND SCHMITT TRIGGER DESCRIPTION The M 74LS 18P is a semiconductor integrated circuit PIN CONFIGURATION TOP VIEW containing tw o 4-input positive-logic N A N D gates having a schm itt trigger function and negative-logic N O R gates.


    OCR Scan     		PDF 500ns, b2LHfl27 0013Sbl 74LS18P

    74ls48 PIN OUT

    Abstract: No abstract text available
    Text: <8> M OTOROLA D E S C R IP T IO N — The S N 54LS /74LS 48 and S N 54LS /74LS 49 are BCD to 7-Segm ent Decoders consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. The LS49 offers active HIGH opencollector outputs for current-sourcing applications to drive logic circuits


    OCR Scan     		PDF /74LS 74ls48 PIN OUT

    mitsubishi air conditioning

    Abstract: 20-PIN M74LS51P Scans-000 74ls51p
    Text: MITSUBISHI LSTTLs M 74LS 51P DUAL 2 -W ID E 2 -IN P U T /3 -IN P U T AND -O R -IN VER T GATE DESCRIPTION The M 74LS 51P is a semiconductor integrated PIN CONFIGURATION TOP VIEW circuit containing dual 2-wide 2-in p u t/3 -in p u t A N D -O R -IN V E R T


    OCR Scan     		PDF M74LS51P M74LS51P b2LHfl27 0013Sbl 14-PIN 16-PIN 20-PIN mitsubishi air conditioning Scans-000 74ls51p

    74ls51p

    Abstract: No abstract text available
    Text: MITSUBISHI LSTTLs M 74LS 51P DUAL 2 -W ID E 2 -IN P U T /3 -IN P U T AND -O R -IN VER T GATE DESCRIPTION The M 74LS 51P is a semiconductor integrated PIN CONFIGURATION TOP VIEW circuit containing dual 2-wide 2-in p u t/3 -in p u t A N D -O R -IN V E R T


    OCR Scan     		PDF 500ns, 0013Sbl 14-PIN 16-PIN 20-PIN 74ls51p

    HCTLS266

    Abstract: 74HCTLS
    Text: Zvtrex ZX54HCTLS ZX74HCTLS 266 Quad Exdusive-NOR Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent exclusive-NOR


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS266 74HCTLS

    74hctls

    Abstract: No abstract text available
    Text: Zytrex_ sags12 Triple 3-Input NAND Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin*out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input NAND


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls

    Altera EP1800

    Abstract: EP1800 JEDEC FORMAT EP1800 altera logicaps TTL library SCHEMA PA BUILT UP EP1800 LOGIC DIAGRAM ep18001
    Text: EP1800 Erasable, User-Configurable LSI circuit capable of implementing 2100 equivalent gates of conventional and custom logic. Speed equivalent to 74LS TTL with 25 MHz clock rates. “Zero Power” typically 10/jA standby . Active power of 250 mW at 5 MHz.


    OCR Scan     		PDF EP1800 Altera EP1800 EP1800 JEDEC FORMAT EP1800 altera logicaps TTL library SCHEMA PA BUILT UP EP1800 LOGIC DIAGRAM ep18001

    7427 pin configuration

    Abstract: TTL 7427 74ls gate symbols 7427 1N3064 1N916 74LS 74LS27 LS27 N7427N
    Text: Signetics I 7427, LS27 Gates Triple Three-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7427 9ns 13m A 74LS 27 10ns 2.7m A ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; Ta = 0°C t o + 70°C


    OCR Scan     		PDF 74LS27 N7427N, N74LS27N N74LS27D 10LSul 7427 pin configuration TTL 7427 74ls gate symbols 7427 1N3064 1N916 74LS LS27 N7427N

    Zytrex OR gate

    Abstract: 74HCTLS
    Text: Z v t r e ZX54HCTLS ZX74HCTLS x Quad 2-Input Exclusive-OR Gates February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-input Exclu­


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS Zytrex OR gate 74HCTLS

    74hctls

    Abstract: No abstract text available
    Text: Zyfrex ZX54HCTLS M M m % ZX74HCTLS Quad 2-Input NAND Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-input NAND


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74hctls

    M74LS09P

    Abstract: 20-PIN
    Text: MITSUBISHI LSTTLs M74LS09P QUADRUPLE 2-IN P U T POSITIVE AND GATES W ITH OPEN COLLECTOR OUTPUTS DESCRIPTION The M 74LS 09P is a semiconductor integrated circuit containing 4 dual-input positive A N D and negative OR gates w ith open collector output. FEATURES


    OCR Scan     		PDF M74LS09P M74LS09P 16-PIN 20-PIN

    HCTLS

    Abstract: 74hctls
    Text: Z v t n ZX54HCTLS M ZX74HCTLS x February 1985 Quad 2-Input AND Gates with Open-Drain Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-Input AND


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS 74hctls

    D74LS

    Abstract: D74LS08
    Text: H D 74LS 08 •Quadruple 2-input Positive AND Gates •PIN ARRANGEMENT ¡CIRCUIT S C H E M A T IC ^ ■ELECTRICAL CHARACTERISTICS T a = - 2 0 ~ +75"C ) Item Input voltage Symbol Test Conditions min - V lL - - 0 .8 V 2.7 - - V - - 0.5 - - - - V cc = 4.75V ,


    OCR Scan     		PDF T-90-10 ib203 D74LS D74LS08

    shiftregisters

    Abstract: EP910 altera TTL library 74LS series logic gates 74LS EP1810 EP1810-45 EP610 PLE40 altera logicaps TTL library
    Text: EP1810 Y 7 \ m HIGH PERFORMANCE 4 8 MACROCELL EPLD m 10 I U FEATURES GENERAL DESCRIPTION • Erasable, User-Configurable LSI circuit capable of implementing 2100 equivalent gates of conven­ tional and custom logic. • Speed equivalent to 74LS TTL with 33 MHz clock


    OCR Scan     		PDF

    74LS00 pinout

    Abstract: GD74HC00 pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 74hc00 and gates TTL 74HC00 74HC GD54HC00
    Text: GDS4/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		PDF GD54/74HC00, GD54/74HCT00 54/74LS00. GD74HCT00 GD54HCT00 74LS00 pinout GD74HC00 pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 74hc00 and gates TTL 74HC00 74HC GD54HC00

    74HCTLS

    Abstract: No abstract text available
    Text: h ftr e ZX54HCTLS ZX74HCTLS x § # ZX54HCTLS ZX74HCTLS Dual AND-OR-Invert Gates and Dual AND-OR Gates February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family The '51 performs the following Boolean functions:


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74HCTLS

    KS74HCT

    Abstract: DEJJ
    Text: SAMSUNG SEMICONDUCTOR INC D2 KS54HCTLS M KS74HCTLS DEJJ T l t m M S U00bE7fl 1 | T'H3»Zj Quad 2-Input NOR Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS


    OCR Scan     		PDF U00bE7fl KS54HCTLS KS74HCTLS 54/74LS KS74HCTLS: KS54HCTLS: 300-mil 7Tb414S 90-XO 14-Pin KS74HCT DEJJ

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC32, GD54/74HCT32 QUAD 2-INPUT OR GATES General Description These devices are identical in pinout to the 54/74LS 32. They contain four independent 2-input OR gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		PDF GD54/74HC32, GD54/74HCT32 54/74LS

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC86, GD54/74HCT86 QUAD 2- INPUT EXCLUSIVE OR GATES General Description These devices are identical in pinout to the 54/74LS 86. They contain four independent 2-input Exclusive OR gates. These devices are characteriz­ ed for operation over wide temperature ranges to


    OCR Scan     		PDF GD54/74HC86, GD54/74HCT86 54/74LS