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    74HCT138 DIP Search Results

    74HCT138 DIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HCT138P-E Renesas Electronics Corporation HD/RD74HC Series Visit Renesas Electronics Corporation
    74HCT138FPEL-E Renesas Electronics Corporation HD/RD74HC Series Visit Renesas Electronics Corporation
    C8231A Rochester Electronics LLC Math Coprocessor, 8-Bit, NMOS, CDIP24, DIP-24 Visit Rochester Electronics LLC Buy
    P8085AH-1 Rochester Electronics LLC Microprocessor, 8-Bit, 6MHz, NMOS, PDIP40, PLASTIC, DIP-40 Visit Rochester Electronics LLC Buy
    TCM3105NL Rochester Electronics LLC Modem, PDIP16, 0.300 INCH, PLASTIC, DIP-16 Visit Rochester Electronics LLC Buy

    74HCT138 DIP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74HC138

    Abstract: related circuit of 74HC138 001aae059 74HC-HCT138 74hc138bq hct138 74HC138 using for testing equipment 74HC138D 74HC138N 74HC138DB
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 related circuit of 74HC138 001aae059 74HC-HCT138 74hc138bq hct138 74HC138 using for testing equipment 74HC138D 74HC138N 74HC138DB

    74HC138

    Abstract: hct138d 74HC138D HCT138 74HC138 philips 74HC138DB 74HC138N 74HC138PW 74HCT138 74HCT138N
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d 74HC138D HCT138 74HC138 philips 74HC138DB 74HC138N 74HC138PW 74HCT138N

    74HC138

    Abstract: hct138d 74HCT138 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips

    74HC_HCT138

    Abstract: 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HCT138 74HC138PW
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 23 December 2005 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC_HCT138 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HC138PW

    Untitled

    Abstract: No abstract text available
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138

    74HCT138

    Abstract: KK74LV138 KK74LV138D KK74LV138N
    Text: TECHNICAL DATA KK74LV138 3-to-8 line decoder/demultiplexer; inverting N SUFFIX PLASTIC The KK74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible 74HCT138. The74LV138 accepts three binary weighted address inputs A0,A1,A2 and when enabled, provide 8 - mutually exclusive active


    Original     		PDF KK74LV138 KK74LV138 74HCT138. The74LV138 KK74LV138N KK74LV138D 012AC) 74HCT138

    LV138

    Abstract: 74HCT138
    Text: TECHNICAL DATA IN74LV138 3-to-8 line decoder/demultiplexer; inverting N SUFFIX PLASTIC The IN74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible 74HCT138. The74LV138 accepts three binary weighted address inputs A0,A1,A2 and when enabled,provide 8 - mutually exclusive active


    Original     		PDF IN74LV138 IN74LV138 74HCT138. The74LV138 IN74LV138N IN74LV138D LV138 74HCT138

    74HC138 using for testing equipment

    Abstract: MNA370 DHVQFN16 SOT763-1 74HC138 74HCT138 74LV138 74LV138BQ 74LV138D 74LV138DB
    Text: 74LV138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 15 November 2007 Product data sheet 1. General description The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138. The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted


    Original     		PDF 74LV138 74LV138 74HC138 74HCT138. 1-of-32 74HC138 using for testing equipment MNA370 DHVQFN16 SOT763-1 74HCT138 74LV138BQ 74LV138D 74LV138DB

    DiskOnChip

    Abstract: DOC123 M-Systems AP-DOC-010 DiskOnChip DIP EVB SA12 SA18 74HCT138 74HCT139 SA11
    Text: Application Note AP-DOC-010 Designing with the DiskOnChip DIP Written by: Yigal Ben-Zeev JULY-2000 91-SR-002-01-7L REV. 3.1 Designing with the DiskOnChip DIP Contents 1 Introduction . 3


    Original     		PDF AP-DOC-010 JULY-2000 91-SR-002-01-7L DiskOnChip DOC123 M-Systems AP-DOC-010 DiskOnChip DIP EVB SA12 SA18 74HCT138 74HCT139 SA11

    74hc128

    Abstract: 74HC9046 74hct7014 74HCT4050 74HC273 74HC1284 74hc14 philips 74HC7014 74hct133 74HCT73
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Sep 22 File under Integrated Circuits, IC06 2001 Nov 02 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HCT04 74hc128 74HC9046 74hct7014 74HCT4050 74HC273 74HC1284 74hc14 philips 74HC7014 74hct133 74HCT73

    AP-DOC-047

    Abstract: DiskOnChip AP-DOC-010 floppy drive pinout DiskOnChip pci evb SA12 MD2200 Disk on chip 16MB TRUEFFS Millennium
    Text: Application Note AP-DOC-010 Sharon Dagan (January 1, 2002) Designing with DiskOnChip 2000 DIP 1. Scope This application note describes how to integrate a DiskOnChip DIP product into a PC-compatible system, including how to configure it to be either the bootable


    Original     		PDF AP-DOC-010) 576MB) AP-DOC-047 DiskOnChip AP-DOC-010 floppy drive pinout DiskOnChip pci evb SA12 MD2200 Disk on chip 16MB TRUEFFS Millennium

    74HC9046

    Abstract: 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Jul 09 File under Integrated Circuits, IC06 1999 Sep 22 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HCT04 74HC9046 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93

    74VHCT138A

    Abstract: 74VHCT138AM 74VHCT138AMTC 74VHCT138AN 74VHCT138ASJ M16A M16D MTC16 74HCT138
    Text: 74VHCT138A 3-to-8 Decoder/Demultiplexer General Description The VHCT138A is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power


    Original     		PDF 74VHCT138A VHCT138A 74VHCT138A 74VHCT138AM 74VHCT138AMTC 74VHCT138AN 74VHCT138ASJ M16A M16D MTC16 74HCT138

    74LS138 pins

    Abstract: 02830
    Text: Revised February 1999 MM74HCT138 3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually


    Original     		PDF MM74HCT138 MM74HCT138M MM74HCT138SJX MM74HCT138SJ MM74HCT138MTC MM74HCT138MTCX MM74HCT138N 74LS138 pins 02830

    Z108-15

    Abstract: 74HCT 74HCT138 Z108-10 Z108L-10 Z108L-15 Zyrel Zyrel z108
    Text: Z108-10 / Z108-15 Zyrel, Inc. Standard & Low Power 1 Mega-Bit CMOS Static RAM PREUMINARY The Z108-L is manufactured using a chip on board technique. Four 32K x 8 CMOS static RAM chips and one CMOS 74HCT138 chip are mounted on a common substrate. The 74HCT device is used to decode the address


    OCR Scan     		PDF Z108-10 Z108-15 Z108-L 74HCT138 74HCT Z108-15 Z108L-10 Z108L-15 Zyrel Zyrel z108

    74HCT138

    Abstract: 74HCT138 DIP 20 PIN LEADLESS CHIP CARRIER EQUIVALENT 74HCT138 IDT74HCT138 54HCT138
    Text: h ig h s p e e d CMOS 1-OF-8 DECODER IDT54/74HCT138 IDT72T33&J FEATURES • • • • • • • • • High speed, comparable to bipolar: 11ns typ. CMOS low power levels: 50 typ. Inputs and outputs directly TTL-compatible Standard 54/74LS138 pinouts Proprietary option 72T338 allows larger memory array


    OCR Scan     		PDF IDT54/74HCT138 IDT72T33 54/74LS138 72T338) MIL-STD-883 IDT54/74HCT138 IDT72T338 L-STD-883, 74HCT138 74HCT138 DIP 20 PIN LEADLESS CHIP CARRIER EQUIVALENT 74HCT138 IDT74HCT138 54HCT138

    Untitled

    Abstract: No abstract text available
    Text: s e m i c o n d u c t o r Revised February 1999 MM74HCT138 3-to-8 Line Decoder the 74LS138. All inputs are protected from damage due to static discharge by diodes to Vc c and ground. General Description The MM74HCT138 decoder utilizes advanced silicon-gate


    OCR Scan     		PDF MM74HCT138 74LS138. MM74HCT138 MM74HCT

    of 74LS138 3 to 8 decoder

    Abstract: MD74HCT138
    Text: wmmwttw 1 of a Ocial D *m >d«/P!«n^i|p^ar Features CONNECTION DIAGRAM OH> TOP VIEW • High latch-up immunity • High current outputs can drive 15 LSTTL loads V C 1 • Low power ISO -C M O S technology A, c 2 16 3 V « '5 a, : 3 14 , c 4 i . ’ • Meets or exceeds all proposed JEDEC 40.2


    OCR Scan     		PDF 54/74LS138 MD54/74HCT138 MD54H T138RC, MD74HCT138RE, of 74LS138 3 to 8 decoder MD74HCT138

    74LS138 pin diagram

    Abstract: ASTAS MD74HCT138RE 74HCT138 74ls138 MD54HCT138 Hll logic 74HCT138 DIP
    Text: mm ' MQ54/MHCÎÎ38R 1 o f 8 O e U l t ^ o ^ / O ç n j ^ ^ if er Features CONNECTION DIAG RAM OU> TOP VIEW • High latch-up immunity • High current outputs can drive 15 LSTTL loads ? . ’ • Low power ISO-CMOS technology A. -C 1 A, C 2 A2 t 3 • Meets or exceeds all proposed JEDEC 40.2


    OCR Scan     		PDF 54/74LS138 MD54/74HCT138 MD54HÃ T138RC, MD74HCT138RE, 74LS138 pin diagram ASTAS MD74HCT138RE 74HCT138 74ls138 MD54HCT138 Hll logic 74HCT138 DIP

    74hct266

    Abstract: 6264LP 27C64 ROM 6264LP-15 6264l 74HC74 mte maxim 300BD 74HC373 GP Batteries 1604A
    Text: M A X I 90 Evaluation Kit Ordering Information PART_TEMP. MAX190EVKIT-DIP* * RANGE BOARD TYPE 0‘C to +70‘C Through-Hole C ontact factory for availability To evaluate the MAX191, order a free sample of the MAX191BCNG by calling toll free 1-800-998-8800 or


    OCR Scan     		PDF MAX190 80C32-based 12-bit RS-232 MAX191 MAX190, 74hct266 6264LP 27C64 ROM 6264LP-15 6264l 74HC74 mte maxim 300BD 74HC373 GP Batteries 1604A

    u574

    Abstract: 74HCT7266 MXM 3 CONNECTOR 27C64 ROM crystal 11.059MHZ 1N4001 1N4148 1N5817 2N7000 74HCT138
    Text: 19-0013; Rev 0; 3/92 EVALUATION KIT /i/i/ixiyi/i M A X 180 Evaluation K it Ordering Information PART TEMP. RANGE M AX180EVKIT 0 #C to +70"C BOARD TYPE I Plastic DIP-Through Hole | EV K it The MAX180 EV kit allows the user to select various MAX180 operating modes and perform conversions


    OCR Scan     		PDF 80C32-based MAX180, 12-bit MAX180 RS-232 u574 74HCT7266 MXM 3 CONNECTOR 27C64 ROM crystal 11.059MHZ 1N4001 1N4148 1N5817 2N7000 74HCT138

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SE M IC O N D U C T O R TECHNICAL DATA M C54/74HCT138A J SUFFIX CERAMIC CASE 620-09 1-of-8 D ecoder/Dem ultiplexer w ith L S T T L C o m p a tib le In p u ts High-Performance Silicon-Gate C M O S N SUFFIX PLASTIC CASE 648-08 The MC54/74HCT138A is ide n tica l in p in o u t to th e LS138. The HCT138A


    OCR Scan     		PDF C54/74HCT138A MC54/74HCT138A LS138. HCT138A MC54/74HCT138A

    Untitled

    Abstract: No abstract text available
    Text: C H IL D S E M I C O N D U C T O R TM 74VHCT138A 3-to-8 Decoder/Demultiplexer General Description The VHCT138A is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bi­


    OCR Scan     		PDF 74VHCT138A VHCT138A

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LS Is SRAM MODULE rl MH5128BUNA-85L,-10L,-12 L/ MH5128BUNA-85H,-10H,-12H 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM DESCRIPTION The M H 5128B U N A is a 41 9430 4-b its CMOS static RAM module organized as 5 2 4288 -w ords by 8-bits. It consists


    OCR Scan     		PDF MH5128BUNA-85L MH5128BUNA-85H 4194304-BIT 524288-WORD 5128B 32-pin 5128BU H5128BUNA-1OL 100ns