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74AUP2G08GM Price and Stock

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Nexperia 74AUP2G08GM,125 IC GATE AND 2CH 2-INP 8XQFN
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DigiKey	74AUP2G08GM,125	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
	74AUP2G08GM,125	Digi-Reel			1	1 $0.43 10 $0.43 100 $0.43 1000 $0.43 10000 $0.43	Buy Now
	74AUP2G08GM,125	Cut Tape				1 - 10 - 100 - 1000 - 10000 -	Buy Now
NXP Semiconductors 74AUP2G08GM,125 74AUP2G08GM - AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PQCC8 '
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74AUP2G08GM,125		3,053		1	1 $0.0911 10 $0.0911 100 $0.0856 1000 $0.0774 10000 $0.0774	Buy Now
NXP Semiconductors 74AUP2G08GM-G AND GATE; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 8; Package Code: VQCCN; Package Shape: SQUARE;
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Vyrian	74AUP2G08GM-G		337			1 - 10 - 100 - 1000 - 10000 -	Get Quote

74AUP2G08GM Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74AUP2G08GM		NXP Semiconductors	Low-power dual 2-input AND gate		Original	PDF
74AUP2G08GM		NXP Semiconductors	74AUP2G08 - IC AUP/ULP/V SERIES, DUAL 2-INPUT AND GATE, PQCC8, 1.6 X 1.6 MM, 0.5 MM HEIGHT, MO-255, SOT902-1, QFN-8U, Gate		Original	PDF
74AUP2G08GM		NXP Semiconductors	Low-power dual 2-input AND gate		Original	PDF
74AUP2G08GM,125		NXP Semiconductors	Low-power dual 2-input AND gate; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse		Original	PDF
74AUP2G08GM,125		NXP Semiconductors	74AUP2G08 - IC AUP/ULP/V SERIES, DUAL 2-INPUT AND GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate		Original	PDF

74AUP2G08GM Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 5 — 1 December 2011 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 6 — 7 June 2012 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP2G08 74AUP2G08	PDF
74AUP2G08 Abstract: 74AUP2G08DC 74AUP2G08GT JESD78 Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 4 — 9 November 2010 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08 74AUP2G08DC 74AUP2G08GT JESD78	PDF
74AUP2G08 Abstract: 74AUP2G08DC 74AUP2G08GM 74AUP2G08GT JESD22-A114E JESD78 Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 02 — 7 April 2008 Product data sheet 1. General description The 74AUP2G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08 74AUP2G08DC 74AUP2G08GM 74AUP2G08GT JESD22-A114E JESD78	PDF
74AUP2G08 Abstract: 74AUP2G08DC 74AUP2G08GD 74AUP2G08GT JESD22-A114E JESD78 Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 03 — 29 May 2008 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08 74AUP2G08DC 74AUP2G08GD 74AUP2G08GT JESD22-A114E JESD78	PDF
NC7WZ08L8X Abstract: SN74AUC2G08DCTR NL27WZ08USG 74AUP2G08 74LVC2G08 NC7WP08 NC7WZ08 NL27WZ08 SN74AUC2G08 SN74AUP2G08 Text: SLG74LB2G08 GreenLIBTM DUAL 2-INPUT AND GATE General Description Features function. • Pb-Free / RoHS Compliant Schmitt-trigger action at all inputs makes the circuit tolerant • Halogen-Free to slower input rise and fall times. • TDFN-8 Package • Low static power consumption IDD = 1A	Original	SLG74LB2G08 NC7WP08 NC7WZ08 000-0074LB2G08-11 NC7WZ08L8X SN74AUC2G08DCTR NL27WZ08USG 74AUP2G08 74LVC2G08 NL27WZ08 SN74AUC2G08 SN74AUP2G08	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 7 — 18 January 2013 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 6 — 7 June 2012 Product data sheet 1. General description The 74AUP2G08 provides the dual 2-input AND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP2G08 74AUP2G08	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G08 Low-power dual 2-input AND gate Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G08 74AUP2G08	PDF