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74AUP2G00GM Price and Stock

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Nexperia 74AUP2G00GM,125 IC GATE NAND 2CH 2-INP 8XQFN
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	74AUP2G00GM,125	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
	74AUP2G00GM,125	Cut Tape				1 - 10 - 100 - 1000 - 10000 -	Buy Now
	74AUP2G00GM,125	Digi-Reel			1	1 $0.44 10 $0.44 100 $0.44 1000 $0.44 10000 $0.44	Buy Now
Rochester Electronics	74AUP2G00GM,125		47,869		1	1 $0.0817 10 $0.0817 100 $0.0768 1000 $0.0694 10000 $0.0694	Buy Now
NXP Semiconductors 74AUP2G00GM,125 74AUP2G00GM - NAND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PQCC8 '
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74AUP2G00GM,125		3,773		1	1 $0.0817 10 $0.0817 100 $0.0768 1000 $0.0694 10000 $0.0694	Buy Now

74AUP2G00GM Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74AUP2G00GM		NXP Semiconductors	Low-power dual 2-input NAND gate		Original	PDF
74AUP2G00GM		NXP Semiconductors	74AUP2G00 - IC AUP/ULP/V SERIES, DUAL 2-INPUT NAND GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8, Gate		Original	PDF
74AUP2G00GM		Philips Semiconductors	Low-power dual 2-input NAND gate		Original	PDF
74AUP2G00GM,125		NXP Semiconductors	Low-power dual 2-input NAND gate; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse		Original	PDF
74AUP2G00GM,125		NXP Semiconductors	74AUP2G00 - IC AUP/ULP/V SERIES, DUAL 2-INPUT NAND GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate		Original	PDF

74AUP2G00GM Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
74AUP2G00DC Abstract: 74AUP2G00 74AUP2G00GM 74AUP2G00GT MO-187 Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP2G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74AUP2G00. 74AUP2G00DC 74AUP2G00GM 74AUP2G00GT MO-187	PDF
74aup2g00dc Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 02 — 15 May 2007 Product data sheet 1. General description The 74AUP2G00 provides the dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74aup2g00dc	PDF
74aup2g00dc Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 6 — 1 December 2011 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74aup2g00dc	PDF
74AUP2G00DC Abstract: 74AUP2G00 74AUP2G00GT JESD78 Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 5 — 21 October 2010 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74AUP2G00DC 74AUP2G00GT JESD78	PDF
74aup2g00dc Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 03 — 3 April 2008 Product data sheet 1. General description The 74AUP2G00 provides the dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74aup2g00dc	PDF
74AUP2G00DC Abstract: 74AUP2G00 74AUP2G00GD 74AUP2G00GT JESD22-A114E JESD78 Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 04 — 5 June 2008 Product data sheet 1. General description The 74AUP2G00 provides the dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74AUP2G00DC 74AUP2G00GD 74AUP2G00GT JESD22-A114E JESD78	PDF
74aup2g00dc Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 7 — 8 June 2012 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP2G00 74AUP2G00 74aup2g00dc	PDF
74AUP2G00 Abstract: 74LVC2G00 NC7WP00 NC7WZ00 NL27WZ00 SN74AUC2G00 SN74AUP2G00 SN74LVC2G00 74aup2g00dc Text: SLG74LB2G00 GreenLIBTM DUAL 2-INPUT NAND GATE General Description The GreenLIB provides the dual 2-input NAND function. Features • Pb-Free / RoHS Compliant • Halogen-Free This device ensures a very low static and dynamic • TDFN-8 Package power • Low static power consumption IDD = 1A	Original	SLG74LB2G00 NC7WP00 NC7WZ00 74AUP2G00 74LVC2G00 NL27WZ00 SN74AUC2G00, 000-0074LB2G00-10 SN74AUC2G00 SN74AUP2G00 SN74LVC2G00 74aup2g00dc	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 7 — 8 June 2012 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP2G00 74AUP2G00	PDF
74aup2g00dc Abstract: No abstract text available Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 8 — 5 February 2013 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP2G00 74AUP2G00 74aup2g00dc	PDF