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    74AUP1T57GW Search Results

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    74AUP1T57GW Price and Stock

    Nexperia 74AUP1T57GW,125

    IC TRANSLATOR UNIDIR 6TSSOP
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    DigiKey 74AUP1T57GW,125 Reel 18,000 3,000
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    74AUP1T57GW,125 Cut Tape 1,918 1
    • 1 $0.5
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    • 100 $0.2782
    • 1000 $0.15647
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    74AUP1T57GW,125 Digi-Reel 1
    • 1 $0.5
    • 10 $0.409
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    Mouser Electronics 74AUP1T57GW,125 5,259
    • 1 $0.51
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    Verical 74AUP1T57GW,125 12,000 3,000
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    Rochester Electronics 74AUP1T57GW,125 120,000 1
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    TTI 74AUP1T57GW,125 Reel 6,000
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    TME 74AUP1T57GW,125 1
    • 1 $0.423
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    Avnet Asia 74AUP1T57GW,125 6 Weeks 6,000
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    NXP Semiconductors 74AUP1T57GW,125

    MAJORITY LOGIC GATE, AUP/ULP/V SERIES, 1-FUNC, 3-INPUT, CMOS, PDSO6
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    Quest Components 74AUP1T57GW,125 100
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    Rochester Electronics 74AUP1T57GW,125 3,000 1
    • 1 $0.1114
    • 10 $0.1114
    • 100 $0.1047
    • 1000 $0.0947
    • 10000 $0.0947
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    Nexperia 74AUP1T57GW/S711H

    74AUP1G57 - Low-power configurable multiple function gate
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics 74AUP1T57GW/S711H 177,000 1
    • 1 $0.105
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    • 100 $0.0987
    • 1000 $0.0892
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    74AUP1T57GW Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AUP1T57GW NXP Semiconductors Low-power configurable gate with voltage-level translator Original PDF
    74AUP1T57GW NXP Semiconductors 74AUP1T57 - IC AUP/ULP/V SERIES, 3-INPUT MAJORITY LOGIC GATE, PDSO6, PLASTIC, SOT-363, SC-88, 6 PIN, Gate Original PDF
    74AUP1T57GW,125 NXP Semiconductors Low-power configurable gate with voltage-level translator; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse Original PDF
    74AUP1T57GW,125 NXP Semiconductors 74AUP1T57 - IC AUP/ULP/V SERIES, 3-INPUT MAJORITY LOGIC GATE, PDSO6, PLASTIC, SOT-363, SC-88, 6 PIN, Gate Original PDF

    74AUP1T57GW Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 02 — 3 August 2009 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		PDF 74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 3 — 21 July 2010 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		PDF 74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 5 — 15 August 2012 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		PDF 74AUP1T57 74AUP1T57

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 01 — 3 January 2008 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		PDF 74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 4 — 1 December 2011 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		PDF 74AUP1T57 74AUP1T57