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    74AUP1G08GF Price and Stock

    Nexperia 74AUP1G08GF,132

    IC GATE AND 1CH 2-INP 6XSON
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    DigiKey 74AUP1G08GF,132 Digi-Reel 1
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    Rochester Electronics LLC 74AUP1G08GF/S500

    IC GATE AND 1CH 2-INP 6XSON
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    DigiKey 74AUP1G08GF/S500 Bulk 1,740
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    Nexperia 74AUP1G08GF/S500,1

    AND 1-Element 2-IN CMOS 6-Pin XSON T/R - Tape and Reel (Alt: 74AUP1G08GF/S500,1)
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    Avnet Americas 74AUP1G08GF/S500,1 Reel 4 Weeks 2,269
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    Rochester Electronics 74AUP1G08GF/S500,1 450,000 1
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    NXP Semiconductors 74AUP1G08GF/S500

    - Tape and Reel (Alt: 74AUP1G08GF/S500)
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    Avnet Americas 74AUP1G08GF/S500 Reel 4 Weeks 2,094
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    Rochester Electronics 74AUP1G08GF/S500 2,400 1
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    NXP Semiconductors 74AUP1G08GF/S500,132

    74AUP1G08GF - AND GATE, AUP/ULP/V SERIES - Tape and Reel (Alt: 74AUP1G08GF/S500,1)
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    74AUP1G08GF Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AUP1G08GF NXP Semiconductors 74AUP1G08 - IC AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G08GF Philips Semiconductors Low-power 2-input AND gate Original PDF
    74AUP1G08GF,132 NXP Semiconductors Low-power 2-input AND gate; Package: SOT891 (XSON6); Container: Tape reel smd Original PDF
    74AUP1G08GF,132 NXP Semiconductors 74AUP1G08 - IC AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G08GF/S500,1 NXP Semiconductors 74AUP1G08GF/S500 - Low-power 2-input AND gate, SOT891 Package Original PDF

    74AUP1G08GF Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G08 provides the single 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G08 74AUP1G08

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 5 — 12 April 2012 Product data sheet 1. General description The 74AUP1G08 provides the single 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G08 74AUP1G08

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 6 — 22 June 2012 Product data sheet 1. General description The 74AUP1G08 provides the single 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G08 74AUP1G08

    SOT-353

    Abstract: No abstract text available
    Text: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V


    Original
    PDF 74AUP1Gxx 74AUP1G86FZ4-7 DFN1410 SN74AUP1G86DRYR 74AUP1G86GM 74AUP1G86FW4-7 DFN1010 SN74AUP1G86DSFR 74AUP1G86GF 74AUP1G125SE-7 SOT-353

    JESD22-A114

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G08 74AUP1G08 JESD22-A114

    74AUP1G08GF

    Abstract: 74AUP1G08 74AUP1G08GM 74AUP1G08GW JESD22-A114-C MO-203
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G08 74AUP1G08 74AUP1G08GF 74AUP1G08GM 74AUP1G08GW JESD22-A114-C MO-203

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 6 — 22 June 2012 Product data sheet 1. General description The 74AUP1G08 provides the single 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G08 74AUP1G08

    74aup1g08

    Abstract: 74AUP1G08GF 74AUP1G08GM 74AUP1G08GW
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G08 provides the single 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G08 74AUP1G08 74AUP1G08GF 74AUP1G08GM 74AUP1G08GW