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    74AUP1G00GF Price and Stock

    Rochester Electronics LLC 74AUP1G00GF,132

    IC GATE NAND
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    DigiKey 74AUP1G00GF,132 Bulk 70,000 2,340
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    Nexperia 74AUP1G00GF,132

    IC GATE NAND 1CH 2-INP 6XSON
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    74AUP1G00GF,132 Digi-Reel 1
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    NXP Semiconductors 74AUP1G00GF,132

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    Quest Components 74AUP1G00GF,132 7,952
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    74AUP1G00GF Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP1G00GF NXP Semiconductors Low-power 2-input NAND gate Original PDF
    74AUP1G00GF Philips Semiconductors Low-power 2-input NAND gate Original PDF
    74AUP1G00GF,132 NXP Semiconductors 74AUP1G00 - IC AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF

    74AUP1G00GF Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AUP1G00GW

    Abstract: 74AUP1G00 74AUP1G00GF 74AUP1G00GM
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G00 74AUP1G00 74AUP1G00GW 74AUP1G00GF 74AUP1G00GM

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G00 74AUP1G00

    SOT-353

    Abstract: No abstract text available
    Text: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V


    Original
    PDF 74AUP1Gxx 74AUP1G86FZ4-7 DFN1410 SN74AUP1G86DRYR 74AUP1G86GM 74AUP1G86FW4-7 DFN1010 SN74AUP1G86DSFR 74AUP1G86GF 74AUP1G125SE-7 SOT-353

    74AUP1G00

    Abstract: 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G00 74AUP1G00 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G00 74AUP1G00

    JESD22-A114

    Abstract: No abstract text available
    Text: 74AUP1G08 Low-power 2-input AND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G08 74AUP1G08 JESD22-A114

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 02.mm — 16 May 2006 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G02 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    PDF 74AUP1G00 74AUP1G00

    NXP MARKING

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G00 74AUP1G00 NXP MARKING

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 5 — 16 March 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    PDF 74AUP1G00 74AUP1G00