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    74AC273 Search Results

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    74AC273P-E Renesas Electronics Corporation HD74AC Series Visit Renesas Electronics Corporation
    74AC273FPEL-E Renesas Electronics Corporation HD74AC Series Visit Renesas Electronics Corporation
    CD74AC273M96 Texas Instruments Octal D-Type Flip-Flops with Reset 20-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74AC273E Texas Instruments Octal D-Type Flip-Flops with Reset 20-PDIP -55 to 125 Visit Texas Instruments Buy
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    74AC273 Price and Stock

    Rochester Electronics LLC MC74AC273DT

    IC D-TYPE POS TRG SNGL 20TSSOP
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    Texas Instruments CD74AC273M96

    IC FF D-TYPE SNGL 8BIT 20SOIC
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    onsemi MC74AC273DTR2G

    IC FF D-TYPE SNGL 8BIT 20TSSOP
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    DigiKey MC74AC273DTR2G Reel 2,500 2,500
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    Rochester Electronics LLC MC74AC273MELG

    IC FF D-TYPE SNGL 8BIT 20SOEIAJ
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    onsemi MC74AC273DWR2G

    IC FF D-TYPE SNGL 8BIT 20SOIC
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    74AC273 Datasheets (45)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AC273 Fairchild Semiconductor Octal D-Type Flip-Flop Original PDF
    74AC273 STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Original PDF
    74AC273 National Semiconductor Octal D Flip-Flop Scan PDF
    74AC273B STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Original PDF
    74AC273B STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Original PDF
    74AC273B STMicroelectronics Octal D-Type Flip Flop with Clear Original PDF
    74AC273B STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Scan PDF
    74AC273CW Fairchild Semiconductor Octal D-Type Flip-Flop Original PDF
    74AC273DC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC273DCX National Semiconductor Octal D Flip-Flop Original PDF
    74AC273FCX National Semiconductor Octal D Flip-Flop Original PDF
    74AC273LCX National Semiconductor Octal D Flip-Flop Original PDF
    74AC273M STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Original PDF
    74AC273M STMicroelectronics Octal D-Type Flip Flop with Clear Original PDF
    74AC273M STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Scan PDF
    74AC273MTC Fairchild Semiconductor Octal D-Type Flip-Flop Original PDF
    74AC273MTC Fairchild Semiconductor Octal D-Type Flip-Flop; Package: TSSOP; No of Pins: 20; Container: Rail Original PDF
    74AC273MTCX Fairchild Semiconductor Octal D-Type Flip-Flop Original PDF
    74AC273MTCX Fairchild Semiconductor Octal D-Type Flip-Flop; Package: TSSOP; No of Pins: 20; Container: Tape & Reel Original PDF
    74AC273MTR STMicroelectronics OCTAL D-TYPE FLIP FLOP WITH CLEAR Original PDF

    74AC273 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master


    Original     		PDF 74AC273, 74ACT273 AC273 ACT273 74ACT273

    74AC273

    Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
    Text: Revised March 2005 74AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input


    Original     		PDF 74AC273 74ACT273 AC273 ACT273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ

    AC273

    Abstract: 74AC273 74AC273B 74AC273M DIP-20
    Text: 74AC273  OCTAL D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 190 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 8 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING


    Original     		PDF 74AC273 AC273 P001J SO-20 P013L 74AC273 74AC273B 74AC273M DIP-20

    smd code dn

    Abstract: 74AC 74AC273 AC273 C1995 E20A J20A N20B
    Text: 54AC 74AC273 Octal D Flip-Flop General Description Features The ’273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously


    Original     		PDF 74AC273 20-3A smd code dn 74AC 74AC273 AC273 C1995 E20A J20A N20B

    74AC273

    Abstract: 74AC273B 74AC273M 74AC273MTR 74AC273TTR DIP-20
    Text: 74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 8µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING


    Original     		PDF 74AC273 250MHz 74AC273 74AC273B 74AC273M 74AC273MTR 74AC273TTR DIP-20

    AC273

    Abstract: 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ M20D MTC20
    Text: Revised December 1998 74AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.


    Original     		PDF 74AC273 AC273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ M20D MTC20

    74AC273

    Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
    Text: 74AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master


    Original     		PDF 74AC273, 74ACT273 AC273 ACT273 74ACT273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273SC 74ACT273SJ

    74ACT273SC

    Abstract: AC273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273MTC ACT273
    Text: Revised October 1999 74AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input


    Original     		PDF 74AC273 74ACT273 AC273 ACT273 74ACT273SC 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273MTC

    74AC273

    Abstract: 74AC273B 74AC273M 74AC273MTR 74AC273TTR DIP-20
    Text: 74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 8µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING


    Original     		PDF 74AC273 250MHz 74AC273 74AC273B 74AC273M 74AC273MTR 74AC273TTR DIP-20

    EEL 19s

    Abstract: No abstract text available
    Text: 74AC273 Octal D-Type Flip-Flop General Description is required and th e C lock and M aster R eset are com m on to all storage elem ents. The AC 273 has e ight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. T h e com m on buff­


    OCR Scan     		PDF 74AC273 EEL 19s

    0c002

    Abstract: No abstract text available
    Text: Semi co n d u August 1993 t o r 54AC/74AC273 Octal D Flip-Flop General Description Features The ’273 has eight edge-triggered D-type flip-flops with indi­ vidual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all


    OCR Scan     		PDF 54AC/74AC273 20-3A 0c002

    Untitled

    Abstract: No abstract text available
    Text: November Revised D ecem ber 1998 S E M IC O N D U C T O R TM 74AC273 Octal D-Type Flip-Flop General Description is required and the C lock and M aster R eset are com m on to all storage elem ents. The AC 273 has e ig h t edge-triggered D-type flip-flops with


    OCR Scan     		PDF 74AC273

    74AC273

    Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ AC273 M20D MS-013 MTC20 74AC273P
    Text: A IR C H N ovem ber 1988 . I l— O Revised D ecem ber 1998 S E M IC Ü N D U C T Ü R tm 74AC273 Octal D-Type Flip-Flop General Description is required and the C lock and M aster Reset are com m on to all storage elem ents. T he AC 273 has eight edge-triggered D -type flip-flops with


    OCR Scan     		PDF 74AC273 AC273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ M20D MS-013 MTC20 74AC273P

    74AC

    Abstract: AC273
    Text: August 1993 Semiconductor 54AC/74AC273 Octal D Flip-Flop General Description Features The ’273 has eight edge-triggered D-type flip-flops with indi­ vidual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all


    OCR Scan     		PDF 54AC/74AC273 74AC AC273

    74AC273

    Abstract: No abstract text available
    Text: S G S -T H O M S O N [MSIfiiSilLiSìlKìtÉfflOSS 74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR PRELIM IN ARY DATA . HIGHSPEED: fMAX = 190 MHz TYP. at Vcc =5V . LOW POWER DISSIPATION: Icc = 8 |xA (MAX.) at Ta = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% V cc (MIN.)


    OCR Scan     		PDF 74AC273 AC273 P001J SO-20 74AC273

    Untitled

    Abstract: No abstract text available
    Text: H A R R I SS E M I C O N DS E C T O R 37E D H M3D2271 0 325522 t >*HAS Technical u a t a _ J_ _ CD54/74AC273 CD54/74A C T273 - " F ^ U -D X l Octal D Flip-Flop with Reset Type Features:


    OCR Scan     		PDF CD54/74AC273 CD54/74A CD54/74ACT273 MS-013AD) 24-Lead 92CS-39037R2 92CS-38926R2

    cd74ac273

    Abstract: 74ACT273
    Text: Technical Data _ CD54/74AC273 CD54/74ACT273 Octal D Flip-Flop with Reset Type Feature»: • B uffered inputs a Typical propagation delay: 6.5 ns @ Vcc - 5 V, 7V = 25° C, CL = 50 pF The RCA CD54/74AC273 and CD54/74ACT273 are octal D flip -flo p s w ith reset that use the RCA ADVANCED CMOS


    OCR Scan     		PDF CD54/74AC273 CD54/74ACT273 CD54/74ACT273 CD74AC273 CD74ACT273 20-lead 92CS-42389 CD54/74AC 74ACT273

    Untitled

    Abstract: No abstract text available
    Text: 74AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buff­ ered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.


    OCR Scan     		PDF 74AC273 AC273

    ic data AC273

    Abstract: sc1046 74AC273 74AC273B 74AC273M AC273 DIP-20
    Text: SGS-THOMSON 74AC273 M IM i[Li gïïlHΩiD(3S OCTAL D-TYPE FLIP FLOP W ITH CLEAR P R E L IM IN A R Y D A T A . . . . . . HIGHSPEED: fMAX = 190 MHz (TYP.) at Vcc =5V LOW POWER DISSIPATION: Icc = 8 |xA (MAX.) at T a = 25 °C HIGH NOISE IMMUNITY: V n ih = V n il = 2 8 % V c c (MIN.)


    OCR Scan     		PDF 74AC273 AC273 SO-20 P013L ic data AC273 sc1046 74AC273 74AC273B 74AC273M DIP-20

    ACT273

    Abstract: ac273 74AC
    Text: AC273 • ACT273 54AC/74AC273 • 54ACT/74ACT273 O ctal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has e ig h t edge-triggered D-type flip -flo p s w ith individual D in p u ts and Q outputs. The com m on buffered C lock CP and M aster Reset


    OCR Scan     		PDF AC273 ACT273 54AC/74AC273 54ACT/74ACT273 ACT273 54/74AC/ACT ac273 74AC

    Untitled

    Abstract: No abstract text available
    Text: Technical Data _ CD54/74AC273 CD54/74ACT273 Octal D Flip-Flop with Reset Type Features: • Buffered inputs m Typical propagation delay: 6.5 n s @ V cc = 5 V, I * = 25° C, CL ; 50 pF RESET THU 1 M C S-S6»76R 2 FUNCTIONAL DIAGRAM The RCA CD54/74AC273 and CD54/74ACT273 are octal D


    OCR Scan     		PDF CD54/74AC273 CD54/74ACT273 CD54/74ACT273 CD74AC273 CD74ACT273 20-lead 500ft 54/74AC

    74AC273

    Abstract: No abstract text available
    Text: 74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR P R ELIM IN ARY DATA . HIGHSPEED: fM A X = 190 MHz TYP. at Vcc =5V . LOW POWER DISSIPATION: Ice = 8 jiA (MAX.) at T a = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 2 8 % Vcc (MIN.) • 50£2 TRANSMISSION LINE DRIVING


    OCR Scan     		PDF 74AC273 74AC273B 74AC273M AC273 double-018 SO-20 74AC273

    ACT273

    Abstract: AC273
    Text: AC273 • ACT273 54AC/74AC273 • 54ACT/74ACT273 Octal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has eight edge-triggered D-type flip-flops w ith individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (15ÎÏÏ) inputs load and reset (clear) all flip-flops


    OCR Scan     		PDF AC273 ACT273 54AC/74AC273 54ACT/74ACT273 ACT273 54/74AC/ACT AC273

    ACT273

    Abstract: 74AC mr 800 diode CP000
    Text: National Semiconductor 54AC/74AC273 • 54ACT/74ACT273 Octal D Flip-Flop General Description Features The ’A C /’ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buff­ ered Clock CP and Master Reset (MR) input load and re­


    OCR Scan     		PDF 54AC/74AC273 54ACT/74ACT273 ACT273 74AC mr 800 diode CP000