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    74AC11032NSR Texas Instruments Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Visit Texas Instruments
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    74AC11032NSR Price and Stock

    Texas Instruments 74AC11032NSR

    IC GATE OR 4CH 2-INP 16SO
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    DigiKey 74AC11032NSR Digi-Reel 1
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    Rochester Electronics 74AC11032NSR 15,153 1
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    Rochester Electronics LLC 74AC11032NSR

    IC GATE OR 4CH 2-INP 16SO
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    74AC11032NSR Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AC11032NSR Texas Instruments Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF
    74AC11032NSR Texas Instruments Quadruple 2-Input Positive-OR Gates Original PDF
    74AC11032NSR Texas Instruments 74AC11032 - Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF
    74AC11032NSRE4 Texas Instruments Quadruple 2-Input Positive-OR Gates Original PDF
    74AC11032NSRE4 Texas Instruments Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF
    74AC11032NSRE4 Texas Instruments 74AC11032 - Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF
    74AC11032NSRG4 Texas Instruments Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF
    74AC11032NSRG4 Texas Instruments 74AC11032 - Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85 Original PDF

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    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil 74AC11032DR 74AC11032N 74AC11032NSR

    74AC11032

    Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DR 74AC11032N 74AC11032NSR MO-150
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DR 74AC11032N 74AC11032NSR MO-150

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil

    74AC11032

    Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DE4 74AC11032DR 74AC11032DRE4 74AC11032N
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DE4 74AC11032DR 74AC11032DRE4 74AC11032N

    74AC11032

    Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil scla008 scyd013 sdyu001x sgyc003d scyb017a

    74AC11032

    Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil MO-150 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process


    Original     		PDF 74AC11032 SCAS007C 500-mA 300-mil