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    74LVC10 Search Results

    74LVC10 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LVC109AQ Renesas Electronics Corporation QUAD FLIPFLOP W SET AND R Visit Renesas Electronics Corporation
    74LVC109APG8 Renesas Electronics Corporation QUAD FLIPFLOP W SET AND R Visit Renesas Electronics Corporation
    74LVC109APY Renesas Electronics Corporation QUAD FLIPFLOP W SET AND R Visit Renesas Electronics Corporation
    74LVC109ADC Renesas Electronics Corporation QUAD FLIPFLOP W SET AND R Visit Renesas Electronics Corporation
    74LVC109ADC8 Renesas Electronics Corporation QUAD FLIPFLOP W SET AND R Visit Renesas Electronics Corporation
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    74LVC10 Price and Stock

    Texas Instruments SN74LVC10ANSR

    IC GATE NAND 3CH 3-INP 14SO
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    DigiKey SN74LVC10ANSR Digi-Reel 3,998 1
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    Texas Instruments SN74LVC10ADBR

    IC GATE NAND 3CH 3-INP 14SSOP
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    DigiKey SN74LVC10ADBR Digi-Reel 3,964 1
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    Texas Instruments SN74LVC10AD

    IC GATE NAND 3CH 3-INP 14SOIC
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    DigiKey SN74LVC10AD Tube 3,057 1
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    Nexperia 74LVC10ABQ,115

    IC GATE NAND 3CH 3-INP 14DHVQFN
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    DigiKey 74LVC10ABQ,115 Cut Tape 2,745 1
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    Texas Instruments SN74LVC10ARGYR

    IC GATE NAND 3CH 3-INP 14VQFN
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    DigiKey SN74LVC10ARGYR Digi-Reel 2,510 1
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    74LVC10 Datasheets (82)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC10 Philips Semiconductors Triple 3-input NAND gate Original PDF
    74LVC109 Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Original PDF
    74LVC109A Integrated Device Technology 3.3V CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET, POSITIVE-EDGE TRIGGER, 5V TOLERANT I-O Original PDF
    74LVC109A Philips Semiconductors Dual J-k Positive Edge Triggered Flip-flop With Clear and Preset Original PDF
    74LVC109D Philips Semiconductors Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger Original PDF
    74LVC109D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LVC109D Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109D Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109D,112 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT109-1 (SO16); Container: Tube Original PDF
    74LVC109D,112 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SO-16, FF/Latch Original PDF
    74LVC109D,118 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13" Original PDF
    74LVC109D,118 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SO-16, FF/Latch Original PDF
    74LVC109DB Philips Semiconductors Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger Original PDF
    74LVC109DB Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LVC109DB Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109DB Philips Semiconductors Dual JK flip-flop with set and reset, positive-edge trigger Scan PDF
    74LVC109DB,112 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6; Package: SOT338-1 (SSOP16); Container: Tube Original PDF
    74LVC109DB,112 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF
    74LVC109DB,118 NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6; Package: SOT338-1 (SSOP16); Container: Reel Pack, SMD, 13" Original PDF
    74LVC109DB,118 NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF

    74LVC10 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC10A Triple 3-input NAND gate Rev. 5 — 17 November 2011 Product data sheet 1. General description The 74LVC10A provides three 3-input NAND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.


    Original     		74LVC10A 74LVC10A JESD8-C/JESD36 JESD22-A114F PDF

    74LVC109

    Abstract: 74LVC109A 74LVC109D 74LVC109DB 74LVC109PW SSOP16 TSSOP16 MNA860
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Apr 28 2004 Mar 18 Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger


    Original     		74LVC109 74LVC109A SCA76 R20/04/pp18 74LVC109 74LVC109D 74LVC109DB 74LVC109PW SSOP16 TSSOP16 MNA860 PDF

    sot762 footprint

    Abstract: 74LVC10A 74LVC10ABQ 74LVC10AD 74LVC10ADB 74LVC10APW DHVQFN14 SSOP14 TSSOP14
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC10A Triple 3-input NAND gate Product specification Supersedes data of 1998 Apr 28 2003 Jun 20 Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • Wide supply voltage range from 1.2 to 3.6 V


    Original     		74LVC10A 74LVC10A EIA/JESD22-A114-A SCA75 613508/03/pp16 sot762 footprint 74LVC10ABQ 74LVC10AD 74LVC10ADB 74LVC10APW DHVQFN14 SSOP14 TSSOP14 PDF

    74LVC109

    Abstract: No abstract text available
    Text: 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Rev. 5 — 29 November 2012 Product data sheet 1. General description The 74LVC109A is a dual positive edge triggered JK flip-flop featuring: • • • • individual J and K inputs clock CP inputs


    Original     		74LVC109 74LVC109A 74LVC109 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC10A Triple 3-input NAND gate Rev. 5 — 17 November 2011 Product data sheet 1. General description The 74LVC10A provides three 3-input NAND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.


    Original     		74LVC10A 74LVC10A JESD8-C/JESD36 JESD22-A114F JESD22-A115-B JESD22-C101E PDF

    DHVQFN14

    Abstract: 74LVC10A 74LVC10ABQ 74LVC10AD 74LVC10ADB 74LVC10APW SSOP14 TSSOP14
    Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • Wide supply voltage range from 1.2 to 3.6 V The 74LVC10A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		74LVC10A 74LVC10A EIA/JESD22-A114-A EIA/JESD22-A115-A OT402-1 MO-153 DHVQFN14 74LVC10ABQ 74LVC10AD 74LVC10ADB 74LVC10APW SSOP14 TSSOP14 PDF

    74LVC10A

    Abstract: 74LVC10APW SSOP14
    Text: INTEGRATED CIRCUITS 74LVC10A Triple 3-input NAND gate Product specification Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • Wide supply voltage range of 1.2 V to 3.6 V


    Original     		74LVC10A 74LVC10A 74LVC10APW SSOP14 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC10A Triple 3-input NAND gate Rev. 4 — 14 September 2011 Product data sheet 1. General description The 74LVC10A provides three 3-input NAND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.


    Original     		74LVC10A 74LVC10A JESD8-C/JESD36 JESD22-A114F JESD22-A115-B JESD22-C101E PDF

    dhvqfn14

    Abstract: SV00418 04482
    Text: INTEGRATED CIRCUITS 74LVC10A Triple 3-input NAND gate Product data Supersedes data of 1998 Apr 28 Philips Semiconductors 2003 Apr 28 Philips Semiconductors Product data Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • Wide supply voltage range of 1.2 V to 3.6 V


    Original     		74LVC10A 74LVC10A dhvqfn14 SV00418 04482 PDF

    74LVC10

    Abstract: 74LVC10PW
    Text: INTEGRATED CIRCUITS 74LVC10 Triple 3-input NAND gate Product specification Replaces data sheet of 1996 Feb IC24 Data Handbook Philips Semiconductors 1997 Apr 28 Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10 FEATURES DESCRIPTION


    Original     		74LVC10 74LVC10 74LVC10PW PDF

    74LVC109

    Abstract: 74LVC109PW
    Text: INTEGRATED CIRCUITS 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1997 Mar 18 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger


    Original     		74LVC109 74LVC109 74HC/HCT109. 74LVC109PW PDF

    TTL 74-series IC LIST

    Abstract: 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805
    Text: 04/18/07 Pin to Pin & Package to Package Compatible IC List Standard 1.65V -3.6 V TTL / CMOS Clock Buffer PotatoSemi PO49FCT3802A 1GHz 1 to 5 PO49FCT3803B 700MHz 1 to 7 PO49FCT3804 800MHz 2X1 to 4 PO49FCT3805B 800MHz 2X1 to 5 PO49FCT3806 750MHz 2X1 to 5 PO49FCT3807B


    Original     		PO49FCT3802A PO49FCT3803B 700MHz PO49FCT3804 800MHz PO49FCT3805B PO49FCT3806 750MHz PO49FCT3807B TTL 74-series IC LIST 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805 PDF

    LCX06

    Abstract: LCX16244 SN74LVCR162245A mc74lcx245 Schmitt Trigger lcx162245 74LVC162244A LCX04 LCX843 LCXH162245 lcx32
    Text: HC Portfolio Comparison PART # LCX00 LCX02 LCX04 LCXU04 LCX05 LCX06 LCX07 LCX08 LCX10 LCX11 LCX14 LCX27 LCX32 LCX38 LCX74 LCX86 LCX109 LCX112 LCX125 LCX126 LCX137 LCX138 LCX139 LCX157 LCX158 LCX161 LCX163 LCX169 LCX240 LCX241 LCX244 LCX245 LCX257 LCX258 LCX273


    Original     		LCX00 LCX02 LCX04 LCXU04 LCX05 LCX06 LCX07 LCX08 LCX10 LCX11 LCX06 LCX16244 SN74LVCR162245A mc74lcx245 Schmitt Trigger lcx162245 74LVC162244A LCX04 LCX843 LCXH162245 lcx32 PDF

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger 74LVC109 FEATURES DESCRIPTION • Wide supply voltage range of 1.2 to 3.6 V The 74LVC1G9 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.


    OCR Scan     		74LVC109 74LVC1G9 74HC/HCT109. 74LVC109 SV00904 PDF

    Untitled

    Abstract: No abstract text available
    Text: IM P \ P -H n H IE '1 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1997 Mar 18 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 PHILIPS Philips Semiconductors Product specification Dual JR flip-flop with set and reset; positive-edge trigger


    OCR Scan     		74LVC109 74LVC109 74HC/HCT109. 74LVC109t PDF

    74LVC10A

    Abstract: 74LVC10APW MS-012AB SSOP14 TSSOP14 jedec MO-150AB 74LVC1
    Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • W ide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8-1A. The 74LVC10A is a high performance, low power, low voltage, Si


    OCR Scan     		74LVC10A 74LVC1 TSSOP14: SQT402-1 MO-153 74LVC10APW MS-012AB SSOP14 TSSOP14 jedec MO-150AB PDF

    Untitled

    Abstract: No abstract text available
    Text: Product Specification Philips Semiconductors Triple 3-input NAND gate QUICK REFERENCE DATA GND = 0 V; Tsmb = 25°C; tr = t, < 2.5 ns FEATURES • • • • • • • 74LVC10 Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.


    OCR Scan     		74LVC10 74LVC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS 74LVC10 Triple 3-input NAND gate Product specification Replaces data sheet of 1996 Feb IC24 Data Handbook Philips Semiconductors 1997 Apr 28 PHILIPS Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10 FEATURES


    OCR Scan     		74LVC10 74LVC10 PDF

    NSP 055

    Abstract: 74LVC109 9l reset 74LVC109PW
    Text: Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger 74LVC109 FEATURES DESCRIPTION • W id e s u p p ly v o lta g e ra n g e of 1.2 to 3 .6 V T h e 7 4 L V C 1 09 is a lo w -v o lta g e S i-g a te C M O S d e v ic e th a t is pin an d


    OCR Scan     		74LVC109 SQT403-1 MO-153 NSP 055 74LVC109 9l reset 74LVC109PW PDF

    74LVC10

    Abstract: 74LVC10D 74LVC10DB 74LVC10PW
    Text: Philips Semiconductors Product Specification Triple 3-input NAND gate FEATURES • • • • • • • 74LVC10 QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.


    OCR Scan     		74LVC10 74LVC10 74LVC10D 74LVC10DB 74LVC10PW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC10A Triple 3-input NAND gate 1998 Apr 28 Product specification Philips Semiconductors P H IItK PHILIPS Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC1OA FEATURES DESCRIPTION • Wide supply voltage range of 1.2 V to 3,6 V


    OCR Scan     		74LVC10A 74LVC1OA 74LVC1 PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LVC10A FEATURES DESCRIPTION • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8-1A. The 74LVC10A is a high performance, low power, low voltage, Si


    OCR Scan     		74LVC10A 74LVC10A 74LVC1OA PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Product Specification Triple 3-input NAND gate FEATURES • • • • • • • 74LVC10 QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.


    OCR Scan     		74LVC10 74LVC10 PDF