74F00 Search Results

74F00

Contextual Info: £ ¿ \ M O T O R O L A MC54/74F00 QUAD 2-INPUT NAND GATE QUAD 2-INPUT NAND GATE FAST SCHOTTKY TTL VCC in nn nn rrn nói nr -EcJ Li> ) 1 |_2_J [ _\ [ _\ 3 4 J SUFFIX CERAMIC CASE 632-08 |_ s j |_6_J _7 GND N SUFFIX PLASTIC CASE 646-06 D SUFFIX SOIC CASE 751A-02

751A-02

Contextual Info: MC54/74F00 QUAD 2-INPUT NAND GATE QUAD 2-INPUT NAND GATE FAST SCHOTTKY TTL VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 1 2 3 4 5 6 14 7 1 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION MC54FXXJ MC74FXXN

TTL 1-of-8 encoder

Abstract: 74LS 2-input OR gate 74LS series logic gates 3 input nand gate 74LS series logic gates 3 input or gate 74F374SC
Contextual Info: 1/2 TTL LOGIC 74F SERIES 74F SERIES • 74F: EXCELLENT SPEED/POWER CONSUMPTION COMBINATION Part Number Description SQP £ ea. Gates & Inverters 74F00SC Quad 2-Input NAND Gate 74F02SC Quad 2-Input NOR Gate 74F04SC Hex Inverter 74F08SC Quad 2-Input AND Gate

74F00

Contextual Info: Product specification Philips Semiconductors-Signetics FAST Products Quad 2-input NAND gate FEATURE 74F00 TYPE TYPICAL PROPAGA­ TION DELAY TYPICAL SUPPLY CURRENT TOTAL 74F00 3.4ns 4.4mA • Industrial temperature range available (-40°C to +85°C) ORDERING INFORMATION

Contextual Info: 00 54F/74F00 74 F °° Quad 2-Input NAND Gate Connection Diagrams Ordering Code: See Section 5 Pin Assignment for LCC and PCC Pin Assignment for DIP and SOIC Input Loading/Fan-Out: See Section 3 for U.L. definitions 54F/74F U.L. Description Pin Names HIGH/LOW

Contextual Info: o Semiconductor National 54F/74F00 Quad 2-Input NAND Gate General Description Features This device contains four independent gates, each of which performs the logic NAND function. • Guaranteed 4000V minimum ESD protection Ordering Code: see section n

74F00 SIGNETICS

Abstract: 74F00
Contextual Info: Signetics FAST 74F00 G ate Quad 2-Input NAND Gate Product Specification FAST Products FUNCTION TABLE INPUTS TYPICAL PROPAGATION DELAY TYPE OUTPUT Dn* L Dnb L 5n H L H H H L H H H L 3 .4 ns 74F00 TY PIC A L SU PPLY CURRENT TO TAL 4 .4 m A ORDERING INFORMATION

74F00D

Abstract: 74F00
Contextual Info: Philip» Sem ioon d uctors-Sign etícs F A ST Products Product spécification Quad 2-input NAND gate FEATURE 74F00 TYPE T Y P IC A L PROPAGA­ T IO N DELAY T Y P IC A L SU PPLY CURRENT T O TA L 74F00 3.4ns 4.4mA * Industrial temperature range available

74F00

Contextual Info: Revised Ju ly 1999 S E M IC D N D U C T D R T M 74F00 Quad 2-Input NAND Gate General Description This device contains fo u r independent gates, each of which perform s the logic N AND function. Ordering Code: Order Number Package Number Package Description

74F00

Abstract: 74F00SC 74F00PC 74F00SJ M14A M14D MS-001 N14A 74F00 Fairchild
Contextual Info: Revised July 1999 74F00 Quad 2-Input NAND Gate General Description This device contains four independent gates, each of which performs the logic NAND function. Ordering Code: Order Number Package Number Package Description 74F00SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

schmitt trigger non inverting

Abstract: 74F864 3 bit magnitude comparator 74F154 74F579 74F5300 equivalent multiplexer 30 pin QUAD D FLIP-FLOP "FAST TTL" 74*545
Contextual Info: Philips Semiconductors Section 2 FAST TTL Logic Devices FAST TTL Logic Series CONTENTS 74F00 74F02 74F04 74F06 74F06A 74F07 74F07A 74F08 74F10 74F11 74F14 74F20 74F27 74F30 74F32 74F37 74F38 74F51 74F64 74F74 74F85 74F86 74F109 74F112 74F113 74F125 74F126

M74F00P

Contextual Info: i b54Tña7 ODlMOäS E ,*oOo c ' I MITSUBISHI ADVANCED SCHOTTKY TTL M 74F00P/FP/DP niTSUBISHI íDGTL LOGIC} Ó7E t ; QUADRUPLE 2-IN PU T POSITIVE NAND GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74F00P is a semiconductor integrated circuit con­ sisting of four 2-i'nput positive-logic NAND gates, usable

Contextual Info: National Semiconductor 54F/74F00 Quad 2-Input NAND Gate General Description Features This device contains four independent gates, each of which performs the logic NAND function. • Guaranteed 4000V minimum ESD protection Ordering Code: see section 11 Commercial

74f00

Contextual Info: SN54F00, 74F00 QUADRUPLE 2-INPUT POSITIVE-NANO GATES 0 2 9 3 2 . MARCH 1 98 7 -REVISED JANUARY 198» Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN 54F00 . . . J PACKAGE SN 74F00 . . . D OR N PACKAGE

54F00DM

Abstract: 54F00FM 54F00LM 74F00 74F00PC 74F00SC 74F00SJ J14A M14A N14A
Contextual Info: 54F 74F00 Quad 2-Input NAND Gate General Description Features This device contains four independent gates each of which performs the logic NAND function Y Commercial Guaranteed 4000V minimum ESD protection Package Number Military 74F00PC Package Description

N74F00N

Abstract: 74F00 I74F00D I74F00N N74F00D
Contextual Info: Philips Semiconductors FAST Products Product specification Quad 2-input NAND gate FEATURE • Industrial temperature range available 74F00 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 74F00 3.4ns 4.4mA (–40°C to +85°C) ORDERING INFORMATION

74f00

Abstract: 74F00DC
Contextual Info: M M O T O R O LA MC54/74F00 QUAD 2-INPUT NAND GATE Q UAD 2 -IN P U T NAND GATE FAST SCHOTTKY TTL Vcc [ïïi nil nn nri M m m Li> r-Pi rña □ J SUFFIX CERAMIC CASE 632-08 14 LU LU LU LU LU LzJ 1 GND N SUFFIX PLASTIC CASE 646-06 P SUFFIX SOIC CASE 751A-02

74F00

Abstract: I74F00D I74F00N N74F00D N74F00N
Contextual Info: INTEGRATED CIRCUITS 74F00 Quad 2-input NAND gate Product specification IC15 Data Handbook Philips Semiconductors 1990 Oct 04 Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C

74F00

Contextual Info: S E M IC O N D U C T O R 74F00 Quad 2-Input NAND Gate General Description Features This device contains lo u r independent gates, each ot w hich perform s the logic NAND tunction. • G uaranteed 4 000V m inim um ESD protection Ordering Code: Commercial Military

54F00DM

Abstract: 54F00FM 74F00PC 74F00SC 74F00SJ J14A M14A M14D N14A W14B
Contextual Info: National Semiconductor 54F/74F00 Quad 2-Input NAND Gate General Description Features This device contains four independent gates, each of which performs the logic NAND function. • Guaranteed 4000V minimum ESD protection Ordering Code: see section 11 Package

3A11

Abstract: 33a8 74F00
Contextual Info: SN54F00, SN 74F00 QU AD R U PLE 2-INPUT PO SITIVE-N AN O G A TES D 2 9 3 2 . M AR C H 1987 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs S N 5 4 F 0 0 . . . J P AC KA G E S N 7 4 F 0 0 . . . D OR N P AC K A G E

Contextual Info: 00 rorû° 54F/74F00 74 F 00 Quad 2-Input NAND Gate Connection Diagrams Ordering Code: See Section 5 Pin Assignment for LCC and PCC Pin Assignment for DIP and SOIC Input Loading/Fan-Out: See Section 3 fo r U.L. d e fin itio n s Pin Names 54F/74F U.L. HIGH/LOW

74F00

Abstract: I74F00D I74F00N N74F00D N74F00N n74f00 quad 2 input nand gate
Contextual Info: Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C TYPE D0a 1 14 VCC D0b 2 13 D3b TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) Q0 3

Contextual Info: o o S 3 National ÆÆ Semiconductor 54F/74F00 Quad 2-Input NAND Gate General Description Features This device co nta in s fo u r ind ependent gates, each o f w hich perfo rm s th e logic N AND function. • G uaranteed 400 0 V m inim um ESD protection Ordering Code: seesection5