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    74273 MULTIPLEXER Search Results

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    74171

    Abstract: 7478 J-K Flip-Flop 7478 jk 74594 7400 series logic ICs shift register by using D flip-flop 7474 7498 4 bit 74395 74822 74278
    Text: QAN1 Registers and Latches in the pASIC Architecture INTRODUCTION Quicklogic’s pASICTM 1 Family of high-performance FPGAs allows logic function speeds of over 100 MHz. The prime objective of the QuickLogic pASIC 1 Family logic cell is to maximize in-system device speed, while


    Original     		PDF QL8X12B, 16-bit QL8X12 1000-gate 74171 7478 J-K Flip-Flop 7478 jk 74594 7400 series logic ICs shift register by using D flip-flop 7474 7498 4 bit 74395 74822 74278

    IC TTL 7432

    Abstract: IC 7402, 7404, 7408, 7432, 7400 ttl 74118 74189 memory ic 74138 74189 ttl memory TTL 74289 RC4458 IC 74373 ttl 74592
    Text: Test and Measurement Systems Electronic Manufacturing Services ABI Electronics Limited Dodworth Business Park Barnsley S75 3SP South Yorkshire United Kingdom Tel: +44 0 1226 207420 Fax: +44 (0)1226 207620 www.abielectronics.co.uk ChipMaster Compact Professional IC List


    Original     		PDF LM7808 LM7905 MAX667 MAX872 MAX874 REF02 REF03 REF05 REF43 TLE2425 IC TTL 7432 IC 7402, 7404, 7408, 7432, 7400 ttl 74118 74189 memory ic 74138 74189 ttl memory TTL 74289 RC4458 IC 74373 ttl 74592

    7474 D flip-flop

    Abstract: vhdl code for 74154 4-to-16 decoder 7478 J-K Flip-Flop vhdl code for 74194 74138 full subtractor 3-8 decoder 74138 shift register by using D flip-flop 7474 full subtractor circuit using xor and nand gates vhdl code for 8-bit BCD adder 74823 FULL ADDER
    Text: Chapter 3 - Macro Library Reference Chapter 3: The Macro Library The QuickLogic Macro Library contains over 500 macros and macro building blocks. While these macros offer a wide range of functions and flexibility, they fall into familiar functional groups. The naming conventions employed in the library are easy


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    full subtractor circuit using xor and nand gates

    Abstract: 74138 full subtractor 3-input-XOR 74138 decoder 7474 D flip-flop vhdl code for 8-bit BCD adder data sheet 74139 vhdl code for 8 bit ODD parity generator 74171 74594
    Text: Chapter 10 - Macro Library Reference Chapter 10: The Macro Library The QuickLogic Macro Library contains over 475 macros and macro building blocks. While these macros offer a wide range of functions and flexibility, they fall into familiar functional groups. The naming conventions employed in the library are easy


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    QL24X32B-1PF144C

    Abstract: vhdl code for 74194 QP-PL84G 74164 pin assignment ls 74138 74139 for bcd to excess 3 code PQ208 QL8X12B PF144 16 bit ripple adder
    Text: QuickTools User's Guide with SpDE™ Reference January 1996 Copyright Information Copyright 1991, 1992, 1993, 1994, 1995 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic


    Original     		PDF Win32s, QL24X32B-1PF144C vhdl code for 74194 QP-PL84G 74164 pin assignment ls 74138 74139 for bcd to excess 3 code PQ208 QL8X12B PF144 16 bit ripple adder

    eltek SMPS 1500 48V

    Abstract: eltek smps 1000 si 48v icl7555 motorola analog ICs vol.1 motorola analog POWER ICs vol.1 eltek smps 1000 eltek smps 1500 Flatpack 1500 48V uc3844 schematic diagram 24v dc dc smps power circuit using ka3842
    Text: You are in Databook Vol. 1 • Click for Main Menu Product Categories CLICK ANY ITEM Return to Main Menu Volume 1 Table of Contents Volume 1 Part Number and App. Note/Hint Index General Information PC Card Power Protected Switches Low-Dropout Linear Voltage Regulators


    Original     		PDF 16-pin 300-inch 150-inch 300-inch 150-inch/0 SO-16 eltek SMPS 1500 48V eltek smps 1000 si 48v icl7555 motorola analog ICs vol.1 motorola analog POWER ICs vol.1 eltek smps 1000 eltek smps 1500 Flatpack 1500 48V uc3844 schematic diagram 24v dc dc smps power circuit using ka3842

    mod 8 ring counter using JK flip flop

    Abstract: memory card reader ckt diagram vhdl code for 8-bit BCD adder verilog code pipeline ripple carry adder 3-8 decoder 74138 pin diagram vhdl code for 8-bit parity checker Verilog code subtractor mod 4 ring counter using JK flip flop pin diagram priority decoder 74138 sentinel s21
    Text: QuickWorks User’sGuide with SpDE Reference COPYRIGHT INFOR MATION Copyright 1991-1998 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic Corporation reserves the right to make periodic modifications


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    74373 latch pin config

    Abstract: 3-8 decoder 74138 pin diagram ci cd 4058 vhdl code for 74194 QL5064 pin diagram of 74109 7400 TTL QL8x12B-0PL68C 74194 shift register waveform Datasheet ci cd 4058
    Text: QuickWorks User’s Guide with SpDE Reference COPYRIGHT INFORMATION Copyright 1991–1999 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic


    Original     		PDF

    TTL 74139

    Abstract: 74153 mux MSI 74148 16cudslr CI 74138 sn 74373 8mcomp 7404 7408 7432 7408, 7404, 7486, 7432 Flip-Flop 7471
    Text: PLSLIB-TTL /$ ^ n^ X LIBRARY • TTL MacroFunction Library Diskette. • ADLIB, Altera Design Librarian Diskette. To increase design ease and productivity Altera has created M acroFunctions. These are high level building blocks that allow the user to design at


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    truth table for ic 74138

    Abstract: 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table
    Text: PLCAD-SUPREME & PLS-SUPREME A+PLUS Programmable Logic Development System & Software Data Sheet September 1991, ver. 1 Features J J J J □ □ H igh-level su p p o rt for A ltera's general-purpose Classic EPLDs M ultiple design entry m ethods LogiCaps schem atic capture


    OCR Scan     		PDF 44-Mbyte, 386-based truth table for ic 74138 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table

    7486 XOR gate

    Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
    Text: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier­


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    up down counter using IC 7476

    Abstract: full adder using Multiplexer IC 74151 74154 shift register IC sk 7443 full adder circuit using ic 74153 multiplexer DN 74352 full adder using ic 74138 74183 adder pin function of ic 74390 7478 J-K Flip-Flop
    Text: FUJITSU MICROELECTRONICS FUJITSU 37417bH 0010SÔ3 23E D MB65XXXX MB66XXXX MB67XXXX AV CMOS SERÍES GATE ARRAYS ~ June 1986 Edition 2.0 : T - 4 2 - n - o °i DESCRIPTION S The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high


    OCR Scan     		PDF 37417bH 0010S MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx MB65xxxx) MB67xxxx) 350AVB S40AVB up down counter using IC 7476 full adder using Multiplexer IC 74151 74154 shift register IC sk 7443 full adder circuit using ic 74153 multiplexer DN 74352 full adder using ic 74138 74183 adder pin function of ic 74390 7478 J-K Flip-Flop

    7408, 7404, 7486, 7432 use NAND gate

    Abstract: JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64
    Text: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 2.0 DESCRIPTION The Fujitsu MB65xxxx/M B66xxxx/M B67xxxx family are a series o f high perform ance CMOS gate arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to standard bipolar logic. The A V M 865xxxx series is an ideal


    OCR Scan     		PDF MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx M865xxxx) MB67xxxx) MB66xxxx) 350AVB 540AVB 850AVB 7408, 7404, 7486, 7432 use NAND gate JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64

    IC 3-8 decoder 74138 pin diagram

    Abstract: full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 DN 74352 circuit diagram for IC 7483 full adder application of ic 74153 ic 74148 block diagram 74191, 74192, 74193 circuit diagram
    Text: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 1.0 DESCRIPTION The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high density, low power, and operating speeds that are comparable to standard bipolar logic. The AV MB65xxxx series is an ideal


    OCR Scan     		PDF MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx MB65xxxx) MB67xxxx) MB66xxxx) IC 3-8 decoder 74138 pin diagram full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 DN 74352 circuit diagram for IC 7483 full adder application of ic 74153 ic 74148 block diagram 74191, 74192, 74193 circuit diagram

    74LS82

    Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
    Text: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte­ grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p­


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    744040

    Abstract: 744017 Scx6206 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218
    Text: July 1985 Jim Semiconductor SCX microCMOS Gate Array Family Application Guide TABLE OF CONTENTS General Description . 2 2.0 Product F eatures. 2.0.1 Enhanced Product Features.


    OCR Scan     		PDF AA32096 744040 744017 Scx6206 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218

    744040

    Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
    Text: July 1985 SCX m icroC M O S G ate A rray Fam ily A pplication G uide TABLE OF CONTENTS 1.0 General Description . 2 2.0 Product Features. 2 Enhanced Product Features. . 2


    OCR Scan     		PDF AA32096 744040 scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395

    counter 7468

    Abstract: umi u26 "CMOS GATE ARRAY" fuji ci 7483 74181 74175 clock 74154 chip configuration u26 umi 74106 9 bit comparator using 7485 CI 7408
    Text: FUJITSU M B65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS June 1986 Edition 1.0 DESCRIPTION The Fujitsu M B 65 xxxx/M B 66xxxx/M B 67 xxxx fam ily are a series of high pe rfo rm an ce CMOS ga te arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to stan dard bipolar logic. The A V M B65xxxx series is an ideal


    OCR Scan     		PDF MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx MB65xxxx) MB67xxxx) MB66xxxx) J22833 CA95054-3197. D-6000 counter 7468 umi u26 "CMOS GATE ARRAY" fuji ci 7483 74181 74175 clock 74154 chip configuration u26 umi 74106 9 bit comparator using 7485 CI 7408

    74152 PIN DIAGRAM

    Abstract: application of ic 74153 A022A 74373 verilog 74373 cmos dual s-r latch 74240T LN 741 T749
    Text: KGL80 ^ ^ ^ ^ ^ ^ ^ ^ jE L E C T R O N i Gate Array Library 0.5um 3.3V CMOS Process PRELIMINARY Library Description KG L80 is a 0 .5 n m 3 .3 V C M O S gate array library supporting d ouble-layer o r triple-layer metal interconnection options. This process is optim ized for


    OCR Scan     		PDF KGL80 VSS30P VSS50 74152 PIN DIAGRAM application of ic 74153 A022A 74373 verilog 74373 cmos dual s-r latch 74240T LN 741 T749

    WD7625LV

    Abstract: 74HC04 ap 74273 multiplexer western digital 286 21SA1 104-D15 WD7625
    Text: D • ^710220 0013GSÖ 134 HlilDC " T ^ 2- - ‘b ' b WD7625LV Address, Data, Hard Disk Buffers and Power Management Device 32S WESTERN DIGITAL 4 -0 S4E D ■ T71Ô22Ô QD13DST 070 H O C TABLE OF CONTENTS _. 52-3S Section Title 1.0 INTRODUCTION .


    OCR Scan     		PDF 0013GSÖ WD7625LV QD13DST 52-3S 0Q131D4 WD7625LV 74HC04 ap 74273 multiplexer western digital 286 21SA1 104-D15 WD7625

    7408, 7404, 7486, 7432

    Abstract: RF400U functional diagram of 7400 and cd 4011 ls 7404 180 nm CMOS standard cell library TEXAS INSTRUMENTS 74191 4BITS s273 buffer 74374 7408 CMOS cmos 7404
    Text: TGC100 Series CMOS Gate Arrays RELEASE 3.0, REVISED JANUARY 1990 • Twelve Arrays with up to 26K Available Gates • Fast Prototype Turnaround Time • Extensive Design Support - Design Libraries Compatible with Daisy, Valid, and Mentor CAE Systems - Tl Regional ASIC Design Centers


    OCR Scan     		PDF TGC100 20-mA Sink/12mA TDB10LJ 120LJ TDC11LJ TDN11LJ 100MHz 7408, 7404, 7486, 7432 RF400U functional diagram of 7400 and cd 4011 ls 7404 180 nm CMOS standard cell library TEXAS INSTRUMENTS 74191 4BITS s273 buffer 74374 7408 CMOS cmos 7404

    0221l

    Abstract: APPLICATION NOTES CD 7474 IC bit-slice TGC119 TGC100 IPF 830 RC02X ci 7432 ttl DTN20 tsg 271
    Text: TGC100 Series 1-|im CMOS Gate Arrays RELEASE 4.0. REVISED SEPTEMBER 1991 14 Arrays with up to 26K Available Gates C E LL C O LU M N Fast Prototype Turnaround Time W IR IN G C H A N N E L Extensive Design Support -Design Libraries Compatible With Valid,u and Mentor CAE Systems


    OCR Scan     		PDF TGC100 16-mA Slnk/12-mA 0221l APPLICATION NOTES CD 7474 IC bit-slice TGC119 IPF 830 RC02X ci 7432 ttl DTN20 tsg 271

    AMD K6

    Abstract: 74147 decimal to binary encoder
    Text: a Preliminary Am3020/3030/3042/3064/3090 Advanced Micro Devices Am3000 Series Family of Programmable Gate Arrays DISTINCTIVE CHARACTERISTICS • Second generation user-programmable gate array ■ Flexible array architecture ■ High performance - 50 ,7 0 ,1 0 0 MHz commercial products


    OCR Scan     		PDF Am3020/3030/3042/3064/3090 Am3000 AMD K6 74147 decimal to binary encoder

    74194 ring counter

    Abstract: grid tie inverter schematic diagram 74299 universal shift register CI 74241 DN 74352 grid tie inverter schematics 7483 parallel adder pin diagram multiplexor 74153 multiplexor 74151 grid tie inverters circuit diagrams
    Text: H Preliminary Am3020/3030/3042/3064/3090 Advanced Micro Devices Am3000 Series Family of Programmable Gate Arrays DISTINCTIVE CHARACTERISTICS • Second generation user-programmable gate array ■ Flexible array architecture ■ High performance - 50, 70,100 MHz commercial products


    OCR Scan     		PDF Am3020/3030/3042/3064/3090 Am3000 74194 ring counter grid tie inverter schematic diagram 74299 universal shift register CI 74241 DN 74352 grid tie inverter schematics 7483 parallel adder pin diagram multiplexor 74153 multiplexor 74151 grid tie inverters circuit diagrams