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    74194 LATCH Search Results

    74194 LATCH Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TCKE800NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE812NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, Fixed Over Voltage Clamp, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE712BNL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 13.2 V, 3.65 A, Latch, Adjustable Over Voltage Protection, WSON10 Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Push-pull type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation

    74194 LATCH Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74171

    Abstract: 7478 J-K Flip-Flop 7478 jk 74594 7400 series logic ICs shift register by using D flip-flop 7474 7498 4 bit 74395 74822 74278
    Text: QAN1 Registers and Latches in the pASIC Architecture INTRODUCTION Quicklogic’s pASICTM 1 Family of high-performance FPGAs allows logic function speeds of over 100 MHz. The prime objective of the QuickLogic pASIC 1 Family logic cell is to maximize in-system device speed, while


    Original     		PDF QL8X12B, 16-bit QL8X12 1000-gate 74171 7478 J-K Flip-Flop 7478 jk 74594 7400 series logic ICs shift register by using D flip-flop 7474 7498 4 bit 74395 74822 74278

    7474 D flip-flop

    Abstract: vhdl code for 74154 4-to-16 decoder 7478 J-K Flip-Flop vhdl code for 74194 74138 full subtractor 3-8 decoder 74138 shift register by using D flip-flop 7474 full subtractor circuit using xor and nand gates vhdl code for 8-bit BCD adder 74823 FULL ADDER
    Text: Chapter 3 - Macro Library Reference Chapter 3: The Macro Library The QuickLogic Macro Library contains over 500 macros and macro building blocks. While these macros offer a wide range of functions and flexibility, they fall into familiar functional groups. The naming conventions employed in the library are easy


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    full subtractor circuit using xor and nand gates

    Abstract: 74138 full subtractor 3-input-XOR 74138 decoder 7474 D flip-flop vhdl code for 8-bit BCD adder data sheet 74139 vhdl code for 8 bit ODD parity generator 74171 74594
    Text: Chapter 10 - Macro Library Reference Chapter 10: The Macro Library The QuickLogic Macro Library contains over 475 macros and macro building blocks. While these macros offer a wide range of functions and flexibility, they fall into familiar functional groups. The naming conventions employed in the library are easy


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    full adder using ic 74138

    Abstract: full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 Application of Multiplexer IC 74151 IC 74138 74138 IC decoder Multiplexer IC 74151
    Text: EP1800JC-EV1 EP1800JC-EV1 EVALUATION CHIP • Advanced CHMOS circuitry features low power, high performance, and high noise immunity power consumption, high noise margins, and ease of design. The EP1800 is implemented in a sub 2-micron dual-polysilicon CHMOS floating gate EPROM tech­


    OCR Scan     		PDF EP1800JC-EV1 EPt800 68-pin EP1800JC-EV1 0UT20 0UT21 OUT22 0UT23 full adder using ic 74138 full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 Application of Multiplexer IC 74151 IC 74138 74138 IC decoder Multiplexer IC 74151

    74194 shift register

    Abstract: 74377 register logicaps shift register by using D flip-flop 7474 74191 counter 74377 Latches 74373 altera logicaps TTL library 74374 74373 ttl 74191
    Text: €Pßl400 PROGRAMMABLE BUS PERIPHERAL FEATURES GENERAL DESCRIPTION • Bus I/O —Register Intensive Buster EPLD The EPB1400 (Buster) EPLD from Altera repre­ sents the firs t M icro proce ssor Peripheral UserConfigurable at the Silicon level. The device consists


    OCR Scan     		PDF 25MHz EPB1400 EPB1400 74194 shift register 74377 register logicaps shift register by using D flip-flop 7474 74191 counter 74377 Latches 74373 altera logicaps TTL library 74374 74373 ttl 74191

    TTL 74139

    Abstract: 74153 mux MSI 74148 16cudslr CI 74138 sn 74373 8mcomp 7404 7408 7432 7408, 7404, 7486, 7432 Flip-Flop 7471
    Text: PLSLIB-TTL /$ ^ n^ X LIBRARY • TTL MacroFunction Library Diskette. • ADLIB, Altera Design Librarian Diskette. To increase design ease and productivity Altera has created M acroFunctions. These are high level building blocks that allow the user to design at


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    74169 SYNCHRONOUS 4-BIT BINARY COUNTER

    Abstract: 74139 demultiplexer 3-8 decoder 74138 pin diagram 3-8 decoder 74138 CI 74151 pin diagram 41 multiplexer 74153 JK Shift Register 74195 bcd counter using j-k flip flop diagram Multiplexer 74153 CI 74138
    Text: AUGUST 1984 semiconductor MSM60300, MSM60700, MSM61000 CMOS GATE ARRAYS GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700, and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors


    OCR Scan     		PDF MSM60300, MSM60700, MSM61000 MSM61000 74169 SYNCHRONOUS 4-BIT BINARY COUNTER 74139 demultiplexer 3-8 decoder 74138 pin diagram 3-8 decoder 74138 CI 74151 pin diagram 41 multiplexer 74153 JK Shift Register 74195 bcd counter using j-k flip flop diagram Multiplexer 74153 CI 74138

    truth table for ic 74138

    Abstract: 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table
    Text: PLCAD-SUPREME & PLS-SUPREME A+PLUS Programmable Logic Development System & Software Data Sheet September 1991, ver. 1 Features J J J J □ □ H igh-level su p p o rt for A ltera's general-purpose Classic EPLDs M ultiple design entry m ethods LogiCaps schem atic capture


    OCR Scan     		PDF 44-Mbyte, 386-based truth table for ic 74138 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table

    74191, 74192, 74193 circuit diagram

    Abstract: IC 7402, 7404, 7408, 7432, 7400 Truth Table 74161 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions counter 74168 74191, 74192, 74193 truth table of ic 7495 A schematic diagram for the IC of 7411
    Text: P L S -W S /H P MAX+PLUS II Programmable Logic Software for HP/Apollo Workstations Data Sheet September 1991, ver. 3 Features □ □ LI LI □ □ □ □ General Description Software support for Classic, M A X 5000, M A X 7000, and ST G E P L D s Runs on H ew lett Packard /A p o llo Series 3000, 3500, 4000, 4500, and


    OCR Scan     		PDF HP400 QIC-24, 60-Mbytetape 74191, 74192, 74193 circuit diagram IC 7402, 7404, 7408, 7432, 7400 Truth Table 74161 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions counter 74168 74191, 74192, 74193 truth table of ic 7495 A schematic diagram for the IC of 7411

    7486 XOR gate

    Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
    Text: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier­


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    74139 demultiplexer

    Abstract: 74169 SYNCHRONOUS 4-BIT BINARY COUNTER pin diagram 41 multiplexer 74153 3-8 decoder 74138 pin diagram bcd counter using j-k flip flop diagram pin diagram priority decoder 74148 CI 74151 74181 74175 clock 74165 block diagram 74151 demultiplexer
    Text: M OIVIOUOUU, s em i c onductor GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700. and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors where each pair is made up of a PMOS and a NMOS transistor.


    OCR Scan     		PDF MSM60300, MSM60700, MSM61000 MSM60300. MSM60700. MSMC0300 MSM60700 MSM61000 74139 demultiplexer 74169 SYNCHRONOUS 4-BIT BINARY COUNTER pin diagram 41 multiplexer 74153 3-8 decoder 74138 pin diagram bcd counter using j-k flip flop diagram pin diagram priority decoder 74148 CI 74151 74181 74175 clock 74165 block diagram 74151 demultiplexer

    IC AND GATE 7408 specification sheet

    Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
    Text: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format


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    ic 74226

    Abstract: jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list Ic ttl 7490, 7493, 7495 ci 74386 7414 NOT gate ic IC LA 74141
    Text: 1SE D RICOH CORP/ ELECTRONIC 7 7 4 4bTO 0G0Q7Qt, b RICOH No. 84-01 4-1-1984 Microelectronic Specification T -tfZ -3 1 RP3G01 0 2 • A N A L O G /D IG IT A L B I- C M O S GATE ARRAYS EFFICIENCY GENERAL DESCRIPTIO N T h e R P 3 G 01 and R P 3 G 0 2 a r e A n a lo g /D ig ita l


    OCR Scan     		PDF RP3G01 RP3G01 ic 74226 jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list Ic ttl 7490, 7493, 7495 ci 74386 7414 NOT gate ic IC LA 74141

    7406n

    Abstract: 7408n 74193N 7416N 7407N 74181N 74LS01N 7438N 7437N 74h00n
    Text: CYFROWE UKtADY SCALONE TTL SERII UCY 74 . /UCA 64 . Wykaz oznaczen parametrów technicznych poj'emnosc Unii statyczny wspólczynnik wzmocnienia pr^dowego w ukladzie OE "21B pr^d bazy IB IC pr^d kolektora Icc pr^d zasilania ICC+ ICC" OD 011 ICCH ICCH-*'


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    MH 74141

    Abstract: Tesla katalog MH74S04 MH74188 information applikation MH74S287 mikroelektronik RFT CDB404E ucy 74132 MZH 115
    Text: m o N r ^ e le l- c fe n a n il- c Information Applikation ._ B|B Information Applikation Heft 26: IMPORT-IS Teil 2 i ' . • fbkj veb Halbleiterwerk frankfurt/oder Ü B d batriab im vab ko m binat mfcr m M ftrnnllt DER TECHNIK I Bezirksvorstand Frankfurt/O.


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    MH1SS1

    Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
    Text: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik


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    up down counter using IC 7476

    Abstract: full adder using Multiplexer IC 74151 74154 shift register IC sk 7443 full adder circuit using ic 74153 multiplexer DN 74352 full adder using ic 74138 74183 adder pin function of ic 74390 7478 J-K Flip-Flop
    Text: FUJITSU MICROELECTRONICS FUJITSU 37417bH 0010SÔ3 23E D MB65XXXX MB66XXXX MB67XXXX AV CMOS SERÍES GATE ARRAYS ~ June 1986 Edition 2.0 : T - 4 2 - n - o °i DESCRIPTION S The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high


    OCR Scan     		PDF 37417bH 0010S MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx MB65xxxx) MB67xxxx) 350AVB S40AVB up down counter using IC 7476 full adder using Multiplexer IC 74151 74154 shift register IC sk 7443 full adder circuit using ic 74153 multiplexer DN 74352 full adder using ic 74138 74183 adder pin function of ic 74390 7478 J-K Flip-Flop

    7408, 7404, 7486, 7432 use NAND gate

    Abstract: JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64
    Text: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 2.0 DESCRIPTION The Fujitsu MB65xxxx/M B66xxxx/M B67xxxx family are a series o f high perform ance CMOS gate arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to standard bipolar logic. The A V M 865xxxx series is an ideal


    OCR Scan     		PDF MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx M865xxxx) MB67xxxx) MB66xxxx) 350AVB 540AVB 850AVB 7408, 7404, 7486, 7432 use NAND gate JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64

    IC 3-8 decoder 74138 pin diagram

    Abstract: full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 DN 74352 circuit diagram for IC 7483 full adder application of ic 74153 ic 74148 block diagram 74191, 74192, 74193 circuit diagram
    Text: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 1.0 DESCRIPTION The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high density, low power, and operating speeds that are comparable to standard bipolar logic. The AV MB65xxxx series is an ideal


    OCR Scan     		PDF MB65XXXX MB66XXXX MB67XXXX MB65xxxx/MB66xxxx/MB67xxxx MB65xxxx) MB67xxxx) MB66xxxx) IC 3-8 decoder 74138 pin diagram full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 DN 74352 circuit diagram for IC 7483 full adder application of ic 74153 ic 74148 block diagram 74191, 74192, 74193 circuit diagram

    IC 3-8 decoder 74138 pin diagram

    Abstract: binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 ic 74148 block diagram MSI IC 74138 decoder
    Text: s I SEMICONDUCTOR GROUP 23E D • t?54E40 G00fl535 1 "T-q2-q \ p a rtII CMOS STANDARD CELL LSI MSM91H000 SERIES ¿U S' This M a terial C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r O K I SEMICONDUCTOR GROUP 23E D ■ b72M240 DGGÔ23b G


    OCR Scan     		PDF MSM91H000 b72MS40 DQQ023b t-42-41 b724240 IC 3-8 decoder 74138 pin diagram binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 ic 74148 block diagram MSI IC 74138 decoder

    ALU IC 74381

    Abstract: encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138
    Text: PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & * r a \ MAX+PLUS II Programmable Logic Development System & Software Data Sheet S eptem ber 1991, ver. 1 U M A X + P L U S II is the single, u nified d e velo p m e n t system for A lte ra 's C lassic, M A X 5000, M A X 7000, and S T G E P L D s .


    OCR Scan     		PDF 486-based 12-ms 44-Mbyte, ALU IC 74381 encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138

    74LS82

    Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
    Text: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte­ grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p­


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    744040

    Abstract: 744017 Scx6206 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218
    Text: July 1985 Jim Semiconductor SCX microCMOS Gate Array Family Application Guide TABLE OF CONTENTS General Description . 2 2.0 Product F eatures. 2.0.1 Enhanced Product Features.


    OCR Scan     		PDF AA32096 744040 744017 Scx6206 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218

    744040

    Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
    Text: July 1985 SCX m icroC M O S G ate A rray Fam ily A pplication G uide TABLE OF CONTENTS 1.0 General Description . 2 2.0 Product Features. 2 Enhanced Product Features. . 2


    OCR Scan     		PDF AA32096 744040 scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395