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    74116 Search Results

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    74116 Price and Stock

    Littelfuse Inc 37411600000

    FUSE BOARD MNT 1.6A 250VAC RAD
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    DigiKey 37411600000 Ammo Pack 1,000 1,000
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    • 1000 $0.33125
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    37411600000 Ammo Pack 1,000
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    Mouser Electronics 37411600000 903
    • 1 $0.99
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    • 100 $0.626
    • 1000 $0.432
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    Newark 37411600000 Bulk 1,000
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    • 1000 $0.502
    • 10000 $0.462
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    ComSIT USA 37411600000 5,000
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    Chip1Stop 37411600000 2,000
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    37411600000 1,570
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    • 10 $0.448
    • 100 $0.358
    • 1000 $0.354
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    Elesa SPA 73741-16

    VDN.FP+IR-A, SOLID HANDWHEELS, F
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    DigiKey 73741-16 Bag 60 1
    • 1 $118.26
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    JRH Electronics 75-474116-1S

    CONN RCPT FMALE 7P SILVER CRIMP
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    DigiKey 75-474116-1S Bag 27 1
    • 1 $57.75
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    • 100 $50.8364
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    Elesa SPA 73741-16-K

    VDN.FP+IR-A, SOLID HANDWHEELS, F
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    DigiKey 73741-16-K Bag 15 1
    • 1 $122.94
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    Phoenix Contact 3274116

    DISTRIBUTION BLOCK VIOLET
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    DigiKey 3274116 Bulk 8 1
    • 1 $1.76
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    Mouser Electronics 3274116 19
    • 1 $1.69
    • 10 $1.68
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    Master Electronics 3274116
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    • 1000 $1.8
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    Sager 3274116 10
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    • 100 $2.38
    • 1000 $2.12
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    Find more 74116 price and stock on Findchips.com

    74116 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74116 WIHA Screw and Nut Drivers - Bits, Blades and Handles, Tools, BIT PWR PHIL 1/4" HEX SZ-1 150MM Original PDF
    74116 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74116 Unknown TTL Data Book 1980 Scan PDF
    74116 Signetics Dual 4-Bit Transparent Latch Scan PDF
    74116 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74116A GIGA Asynchronous SRAMs, 4Meg, 256K x 16,3.3 V Original PDF

    74116 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    9308 National Semiconductor Dual 4-Bit Latch

    Abstract: DM9308N 74116 400X 9308DMQB 9308FMQB C1995 DM9308 J24A N24A
    Text: 9308 DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems Each latch contains both an active LOW Master Reset input an active LOW Enable inputs The 74116 is a pin for pin equivalent of


    Original     		PDF DM9308 9308DMQB 9308FMQB DM9308N C1995 9308 National Semiconductor Dual 4-Bit Latch DM9308N 74116 400X J24A N24A

    Untitled

    Abstract: No abstract text available
    Text: 74116ATP/X TSOP, FP-BGA Commercial Temp Industrial Temp 8, 10, 12 ns 3.3 V VDD Center VDD and VSS 256K x 16 4Mb Asynchronous SRAM Features FP-BGA 256K x 16 Bump Configuration Package X • Fast access time: 8, 10, 12 ns • CMOS low power operation: 130/105/95 mA at minimum


    Original     		PDF GS74116ATP/X 44-pin 74116A

    Untitled

    Abstract: No abstract text available
    Text: 74116ATP/J/X SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp 256K x 16 4Mb Asynchronous SRAM 8, 10, 12 ns 3.3 V VDD Center VDD and VSS Features • Fast access time: 8, 10, 12 ns • CMOS low power operation: 130/105/95 mA at minimum cycle time • Single 3.3 V power supply


    Original     		PDF GS74116ATP/J/X 44-pin 16-Pin 74116A

    Untitled

    Abstract: No abstract text available
    Text: 74116ATP/J/X SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp 8, 10, 12 ns 3.3 V VDD Center VDD and VSS 256K x 16 4Mb Asynchronous SRAM Features • Fast access time: 8, 10, 12 ns • CMOS low power operation: 130/105/95 mA at minimum cycle time • Single 3.3 V power supply


    Original     		PDF GS74116ATP/J/X 44-pin 16-Pin 74116A

    Untitled

    Abstract: No abstract text available
    Text: 74116ATP/J/U SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp 256K x 16 4Mb Asynchronous SRAM 8, 10, 12 ns 3.3 V VDD Center VDD and VSS Features • Fast access time: 8, 10, 12 ns • CMOS low power operation: 155/125/105 mA at minimum cycle time • Single 3.3 V ± 0.3 V power supply


    Original     		PDF GS74116ATP/J/U 44-pin 16-Pin GS74116ATP-8T 74116A

    k2645

    Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
    Text: 1 BHIAB Electronics Du som söker besvärliga IC & transistorer, börja Ditt sökande hos oss – vi har fler typer på lager än man rimlingen kan begära av ett företag Denna utgåva visar lagerartiklar men tyvärr saknas priser och viss information Men uppdatering sker kontinuerligt


    Original     		PDF MK135 MK136 MK137 MK138 MK139 MK140 Mk142 MK145 MK155 157kr k2645 k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417

    74116

    Abstract: No abstract text available
    Text: 74116 Signetics Latch Dual 4-Bit Transparent Latch Product Specification Logic Products DESCRIPTION The '116 has two independent 4-bit transparent latches. Each 4-bit latch is controlled by_a two-input active LOW Enable gate Eo and E^. When both Eo and E, are LOW, the data enters the


    OCR Scan     		PDF 1N916, 1N3064, 500ns 74116

    74116

    Abstract: VU peak hold 1N3064 1N916 74LS N74116N 74116 24 pin
    Text: Sgnelics 74116 Latch Dual 4-Bit Transparent Latch Product Specification Logic Products DESCRIPTION The '116 has two independent 4-bit transparent latches. Each 4-bit latch is controlled by a two-input active LOW Enabje gate Eo and E i . When both Eo and E1 are LOW, the data enters the


    OCR Scan     		PDF 1N916, 1N3064, 500ns 74116 VU peak hold 1N3064 1N916 74LS N74116N 74116 24 pin

    Untitled

    Abstract: No abstract text available
    Text: 9308 National Semiconductor 9308/DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed lo r general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input an active LOW Enable inputs. The 74116 is a pin for pin equivalent of


    OCR Scan     		PDF 9308/DM9308 TL/F/10208-1 9308DMQB, 9308FMQB DM9308N TL/F/10208-3

    74116

    Abstract: No abstract text available
    Text: Signetics 74116 Latch Dual 4-Bit Transparent Latch Product Specification Logic Products DESCRIPTION TYPE TYPICAL PROPAGATION DELAY— DATA TO OUTPUT TYPICAL SUPPLY CURRENT TOTAL 11ns 50mA 74116 ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T a = 0°C to + 7 0 ”C


    OCR Scan     		PDF 1N916, 1N3064, 500ns 74116

    1N3064

    Abstract: SN54116 SN74116
    Text: SN54116, 74116 DUAL 4-BIT LATCHES WITH CLEAR DECEM BER 1972 —R EV ISED MARCH 1988 SN 5411 6 . . . J OR W PACKAGE SN 74116 . . . N PACKAGE Two Independent 4-Bit Latches in a Single Package 1CLR 1C1 1C2 1D1 101 1D2 102 1D3 103 1D4 104 GND Dual Gated Enable Inputs Sim plify Cascad­


    OCR Scan     		PDF SN54116, SN74116 SN54116 1N3064 SN54116 SN74116

    ic ns 4263

    Abstract: IC 9308 pin diagram
    Text: ^National Æuâ Semiconductor 9308/DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input an active LOW Enable inputs. The 74116 is a pin for pin equivalent of


    OCR Scan     		PDF 9308/DM9308 ic ns 4263 IC 9308 pin diagram

    Untitled

    Abstract: No abstract text available
    Text: SN54116, 74116 DUAL 4-BIT LATCHES WITH CLEAR DECEMBER 1972 —REVISED MARCH 1988 S N 5 41 1 6 . . . J OR W PACKAG E SN 74116 . . . N PACKAGE Two Independent 4-Bit Latches in a Single Package T O P V IE W [jr O 24 3 Vcc 2 3 ] 204 1C2 C 3 22 3 2D4 1D 1 O


    OCR Scan     		PDF SN54116, SN74116

    Untitled

    Abstract: No abstract text available
    Text: 08 C O N N E C T IO N D IA G R A M PINOUT A : y } ~ 9308 ! 9 3 L 0 8 > /# C DUAL 4-BIT LATCH D E S C R IP T IO N — The ’08 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input an active LOW Enable inputs. The 54/74116


    OCR Scan     		PDF 9308PC, 93L08PC 9308DC, 93L08DC 9308DM, 93L08DM 9308FC, 93L08FC

    IC 9308 pin diagram

    Abstract: No abstract text available
    Text: June 1989 Semiconductor 9308/DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input an active LOW Enable inputs. The 74116 is a pin for pin equivalent of


    OCR Scan     		PDF 9308/DM9308 IC 9308 pin diagram

    VU peak hold

    Abstract: 74116 1N3064 1N916 74LS N74116N
    Text: Signetics 74116 Latch Dual 4-B it Transp arent Latch Product Specification Logic Products DESCRIPTIO N The '116 has two independent 4-bit transparent latches. Each 4-bit latch is controlled by a two-input active LOW Enable gate E0 and E-, . When both E0 and E-| are LOW, the data enters the


    OCR Scan     		PDF 1N916, 1N3064, 500ris 500ns VU peak hold 74116 1N3064 1N916 74LS N74116N

    IC 74116 pin diagram

    Abstract: s74116 74116
    Text: 74116 S ig n e t ic s Latch Dual 4-Bit Transparent Latch Product Specification Logic Products DESCRIPTION TYPE TYPICAL PROPAGATION DELAY— DATA TO OUTPUT TYPICAL SUPPLY CURRENT TOTAL 11ns 50mA 74116 ORDERING CODE COMMERCIAL RANGE Vcc = 5 V ± 5 % ; T a = 0 “C to +70°C


    OCR Scan     		PDF 1N916, 1N3064, 500ns 500ns IC 74116 pin diagram s74116 74116

    74191 8 bit

    Abstract: 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11

    C350AVB

    Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
    Text: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices


    OCR Scan     		PDF 37MT7bH 74LS175 74LS181 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A C350AVB full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder

    CI 7446

    Abstract: CI 74141 cI 74ls47 CI 7447 CI 7448 ci 7445 7-seg ANODE COMMON CI 74LS48 TTL 7446 BCD D147
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 i Ao A RBO a A 2 b A3 e d 1 El e 13 12 11 10 RBI f 9 E 9 15 3 2 4 m l 14 6 m Do MR TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan     		PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 54LS/74LS47 54LS/74LS48 54LS/74LS49 54LS/74LS247 54LS/74LS248 CI 7446 CI 74141 cI 74ls47 CI 7447 CI 7448 ci 7445 7-seg ANODE COMMON CI 74LS48 TTL 7446 BCD D147

    D flip-flop 74175 pin

    Abstract: 74LS78 74LS374 74ls373 93L38 74298 D150 D190 74LS374 74LS373 74ls373 D Flip-Flop
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D82 54LS/74LS78 D81 54LS/74LS541 Vcc |S5| RSj FSI F7| F»l FS1 j b j j j F5I Fä| FI j j j SD SD J Q J C CP Q — e CP K >— 12 Q Q 5— 9 K CD CD LlI lil LiJ Lil LiTIU LzJ LlI üü bsJ QNO 9 3 4 li 5 D85 54LS/74LS373


    OCR Scan     		PDF 54LS/74LS541 54LS/74LS78 54LS/74LS168, 54LS/74LS169 54LS/74LS490 54LS/74LS373 54LS/74LS374 54LS/74LS256 /74LS573 93L34 D flip-flop 74175 pin 74LS78 74LS374 74ls373 93L38 74298 D150 D190 74LS374 74LS373 74ls373 D Flip-Flop

    7475 D flip-flop

    Abstract: quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 74174 shift register 9374 74LS173 4 bit 3 state quad register 74LS279 D flip-flop 74175 pin
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 i Ao A R BO a A 2 b A 3 e d 1 E l RBI e 13 12 11 10 E 9 f 9 15 3 2 4 m l 14 6 m Do M R TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan     		PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 /74LS573 93L34 54LS/74LS259 93L38 54LS/74LS170 7475 D flip-flop quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 74174 shift register 9374 74LS173 4 bit 3 state quad register 74LS279 D flip-flop 74175 pin

    7486 XOR gate

    Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
    Text: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier­


    OCR Scan     		PDF

    TTL 74139

    Abstract: 74153 mux MSI 74148 16cudslr CI 74138 sn 74373 8mcomp 7404 7408 7432 7408, 7404, 7486, 7432 Flip-Flop 7471
    Text: PLSLIB-TTL /$ ^ n^ X LIBRARY • TTL MacroFunction Library Diskette. • ADLIB, Altera Design Librarian Diskette. To increase design ease and productivity Altera has created M acroFunctions. These are high level building blocks that allow the user to design at


    OCR Scan     		PDF