PO74G374A
Abstract: No abstract text available
Text: PO54G374A, PO74G374A www.potatosemi.com OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS 54 & 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
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PO54G374A,
PO74G374A
600MHz
5000-VHuman-BodyModel
A114-A)
200-VMachineModel
A115-A)
20pin
PO74G374A
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PO74G74A
Abstract: PO74G74
Text: PO54G74A, PO74G74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS www.potatosemi.com WITH CLEAR AND PRESET 54, 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 125°C, –55°C to 125°C . Operating frequency is faster than 600MHz
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PO54G74A,
PO74G74A
600MHz
5000-VHuman-BodyModel
A114-A)
200-VMachineModel
A115-A)
14pin
150mil
PO74G74A
PO74G74
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74107N
Abstract: FJJ121 FJJ121A FJJ261
Text: T.T.L. D UAL JK MASTER-SLAVE FLIP-FLOP F JJ 2 6 I F JJ 2 6 IA Corresponds to 74 Series type 74107N PR O VISIO N AL D A TA These devices are tran sistor-tran sistor logic dual JK m a ste r-sla v e flip-flops in the FJ s e r ie s of integrated c ircu its. The FJJ261 corresponds to '74 Series' type
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FJJ26I
FJJ26IA
74107N
FJJ261
74107N.
O-116
FJJ121
14-lead
FJJ121A
74107N
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Untitled
Abstract: No abstract text available
Text: LS TTL DN74LS Series DN74LS174 DN74LS174 1074^ 74- Hex D-type Flip Flops with Reset) • Description P-2 DN74LS174 contains six positive-edge triggered D-type flip-flop circuits with common clock-CP and direct-coupled reset inputs, and independent data-D inputs.
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DN74LS
DN74LS174
74P-2
DN74LS174
16-pin
50flp
MA161.
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hp 450f
Abstract: ACQ821 AM29821
Text: National Semiconductor November 1990 54ACQ/74 ACQ821 • 54ACTQ/74ACTQ821 Quiet Series 10-Bit D Flip-Flop with TRI-STATE Outputs General Description Features The ’ACQ/’ACTQ821 ¡s a 10-bit D flip-flop with non-invert ing TRI-STATE outputs arranged in a broadside pinout. The
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ACQ/74
ACQ821
54ACTQ/74ACTQ821
10-Bit
ACTQ821
ACQ821
ft003
7J74-10
hp 450f
AM29821
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Untitled
Abstract: No abstract text available
Text: LS TTL DN74LS Series DN74LS74A DN74LS74A IV 74 7^A Dual D-type Positive Edge-triggered Flip-Flops with Set and Reset) • P-1 Description DN74LS74A contains two positive-edge triggered D-type flip-flop circuits, each with independent clock-CP data-D, and direct-coupled set and reset input terminals.
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DN74LS
DN74LS74A
DN74LS74A
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Untitled
Abstract: No abstract text available
Text: Q821 33 National ÆÆ Semiconductor 74ACQ821 • 54ACTQ/74 ACTQ821 Quiet Series 10-Bit D Flip-Flop with TRI-STATE Outputs General Description Features The ’A C Q /’ACTQ821 is a 10-bit D flip-flop with non-invert ing TRI-STATE outputs arranged in a broadside pinout. The
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74ACQ821
54ACTQ/74
ACTQ821
10-Bit
74ACTQ
54ACTQ
74ACTQ
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7470N
Abstract: 6470N FJJ101 FJJ101A FJJ106 FJJ131
Text: T.T.L. SINGLE JK FLIP-FLOPS FIIIO I Fj j |0 |A FJJI06 Correspond to 74 Series types 7470N, 6470N TEN TA TIV E DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic sin g le JK flip -flo p s in the F J s e r i e s of in te g rate d c ir c u its . T he F JJ101 c o rre sp o n d s to '74 S e rie s '
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7470N,
6470IM
FJJ106
FJJ101
6470N.
O-116
14-lead
7470N
6470N
FJJ101A
FJJ131
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tnr 14d
Abstract: 74ACTQ74 74ACTQ74PC 74ACTQ74SC 74ACTQ74SJ M14A M14D MS-001 N14A
Text: s e m ic o n d u c t o r ^a rc h 1 Revised June 1999 74ACTQ74 Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: T he 74A C TQ 74 is a dual D -type flip-flop w ith A synchro nous C lear and Set inputs and com plem entary Q, Q o ut
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74ACTQ74
74ACTQ74
ACTQ74
tnr 14d
74ACTQ74PC
74ACTQ74SC
74ACTQ74SJ
M14A
M14D
MS-001
N14A
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Untitled
Abstract: No abstract text available
Text: 74 VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Toler ant Inputs/Outputs and 26Q Series Resistors in Outputs General Description Features The V C X 1 62835 low voltage 18-bit universal bus driver com bines D -type latches and D-type flip-flops to allow data
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74VCX162835
18-Bit
VCX162835
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Untitled
Abstract: No abstract text available
Text: Revised October 1998 SEMICONDUCTOR TM 74 VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Toler ant Inputs/Outputs and 26£1 Series Resistors in Outputs General Description Features The VCX162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data
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VCX162835
18-Bit
VCX162835
PC100
74VCX162835
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7474N
Abstract: FJJ131 FJJ131A FJJ136
Text: Fill31 FJJI3IA FJJI36 T.T.L. EDGE-TRIGGERED DUAL D-TYPE FLIP-FLOPS Correspond to 74 Series types 7474N, 6474M T ENTATIVE DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic e d g e -trig g e re d dual D -type flip -flo p s, w ith d ire c t, c le a r and p r e s e t inputs and com plem entary Q and
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Fill31
7474N,
FJJ131
FJJ136
type6474N.
O-116
14-lead
FJJ131A
7474N
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Untitled
Abstract: No abstract text available
Text: „ Revised April 1999 SEMICONDUCTOR TM 74 VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Q Series Resistors in Outputs General Description Features The V C X 1 62835 low voltage 18-bit universal bus driver com bines D -type latches and D-type flip-flops to allow data
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18-Bit
VCX162835
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Untitled
Abstract: No abstract text available
Text: r - 1 ,"* Revised Ju ly 1999 74 VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26£1 Series Resistors in Outputs General Description Features The V C X 162835 low voltage 18-bit universal bus driver com bines D -type latches and D -type flip-flops to allow data
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VCX162835
18-Bit
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7474N
Abstract: 7474N TTL FJJ121 FJJ131 FJJ131A FJJ136 to74
Text: Fill31 FJJI3IA FJJI36 T.T.L. E D G E -T R IG G E R E D D U A L D-TYPE FLIP-FLOPS Correspond to 74 Series types 7474N, 6474M T ENTATIVE DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic e d g e -trig g e re d dual D -type flip -flo p s, w ith d ire c t, c le a r and p r e s e t inputs and com plem entary Q and
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Fill31
7474N,
FJJ131
FJJ136
type6474N.
O-116
14-lead
FJJ131A
7474N
7474N TTL
FJJ121
to74
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logic ic 74LS76 pin diagram
Abstract: j-k flip flop 74ls76 IC 74LS76
Text: LS TTL DN74LS Series DN74LS76 D N 74LS76 D ^ 74^ 7^ Dual J-K F lip -F lo p s with S e t and Reset • Description P -2 D N 7 4 L S 7 6 contains tw o negative-edge triggered J-K flip-flop circuits, each w ith independent clock-C P, J, K, and directcoupled set and reset input terminals.
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DN74LS
DN74LS76
74LS76
16-pin
logic ic 74LS76 pin diagram
j-k flip flop 74ls76
IC 74LS76
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Untitled
Abstract: No abstract text available
Text: P relim inary s e m ic o n d u c t o r Revised November 1999 74 VCX162374 Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26£1 Series Resistors in Outputs Preliminary General Description Features The VCX162374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented
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VCX162374
16-Bit
VCX162374
74VCX162374
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DN74LS74A
Abstract: S-R flip flop clock
Text: LS TTL DN74LS Series DN74LS74A DN74LS74A IV 74 I S 7^A Dual D -type P o sitiv e E dge-triggered F lip -F lo p s with S e t and Reset) • Description P-1 D N 7 4 L S 7 4 A contains tw o positive-edge triggered D -type flip-flop circuits, each w ith ind ep en dent clock-C P data-D,
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DN74LS
DN74LS74A
DN74LS74A
14-pin
SO-14D)
S-R flip flop clock
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7476N
Abstract: tir 101a 6476N FJJ191 FJJ191A FJJ196 16-mA TTL 7476N TO74 package
Text: T.T.L. D U A L M A ST E R -SLA V E JK FLIP-FLOPS W IT H PRESET A N D CLEAR F J II9 I Ell 101A C| 11QA Correspond to 74 Series types 7476N, 6476N ^ TENTATIVE DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic dual JK m a s te r-s la v e flip flops, w ith p r e s e t and c le a r inputs, in the F J s e r ie s of in te g rate d c irc u its .
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7476N,
6476N
FJJ191
FJJ196corresponds
6476N.
16-lead
FJJ191A
7476N
tir 101a
6476N
FJJ196
16-mA
TTL 7476N
TO74 package
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hc173
Abstract: spxxhc374 74LS HC113
Text: SPXXHC113 SPXXHC173 SPXXHC174 SPXXHC175 SPXXHC374 SPXXHC574 54/74 Series Flip Flops O rd erin g Inform ation P la s tic DIP, Industrial T e m p R a n g e C e ra m ic DIP, Industrial T e m p R a ng e C e ra m ic D I P ^ 1 M ilita ry T tfc Î P R a ng e SP74H CXXXN
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SPXXHC113
SPXXHC173
SPXXHC174
SPXXHC175
SPXXHC374
SPXXHC574
HC173
HC374
hc173
74LS
HC113
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7476N
Abstract: 15V-OV FJJ191 6476N FJJ121 FJJ131 FJJ191A FJJ196
Text: T .T .L . D U A L M ASTER-SLAVE F J II 9 I JK FLIP-FLOPS W IT H PRESET E ll 1 0 1 A A N D CLEAR C| 11QA Correspond to 74 Series types 7476N, 647 6N ^ TENTATIVE DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic dual JK m a s te r-s la v e flip flops, w ith p r e s e t and c le a r inputs, in the F J s e r ie s of in te g rate d c irc u its .
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7476N,
6476N
FJJ191
FJJ196corresponds
6476N.
16-lead
FJJ191A
7476N
15V-OV
6476N
FJJ121
FJJ131
FJJ196
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MN74HC175
Abstract: MN74HC175S 74LS SERIES cmos logic data
Text: M N 74 H C 1 7 5 /M N 7 4 H C 1 7 5 S High-Speed CMOS Logic MN74HC Series M N 7 4 H C 1 7 5 / M N 7 4 H C 1 7 5 S Quad D-Type F lip -F lop s with Clear • Description P -3 M N 7 4 H C 1 7 5 /M N 7 4 H C 1 7 5 S c o n ta in fo u r q u a d D -ty p e flip-flop
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MN74HC
MN74HC175/MN74HC175S
MN74HC175
MN74HC175S
MN74HC175/MN74HC175S
MN74HC175S
74LS SERIES cmos logic data
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7491N shift register
Abstract: 7491N 7491AN FJJ101 FJJ131 FJJ151 FJJ151A
Text: T.T.L. 8-BIT SHIFT REGISTER FI 115 1 FJJI5IA Corresponds to 74 Series type 7491AN P R O V IS IO N A L D A T A These devices a re tra n sisto r - tra n sisto r logic se ria l in - se ria l out 8 -b it shift re g iste rs, consisting of eight R - S m a s te r-s la v e flip-flops, in the F J se rie s of
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FJJ151
7491AN
FJJ151
7491N.
O-116
14-lead
FJJ151A
7491N shift register
7491N
7491AN
FJJ101
FJJ131
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16-LINE TO 4-LINE PRIORITY ENCODERS
Abstract: 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters HD74S synchronous binary counter with latch
Text: o V o la i \ \_ a . TTL H D 74/H D 74S Series I M A IN C HARACTERISTICS I PERFORMANCE (per gate Performance HD74 Series HD74S Series Propagation 10 ns 3 ns Delay Time Power 10 mW 20 m\V Dissipation Speed-Power 100 pJ 60 pJ Product O Series Param eter max)
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HD74/HD74S
HD74S
HD74Series
16-bit
DP-14
DP-16
DP-20
16-LINE TO 4-LINE PRIORITY ENCODERS
74 series logic gates
Flip flops
"J-K Flip flops"
J-K Flip flops
NAND Gates
HD74
Synchronous 8-Bit Binary Counters
synchronous binary counter with latch
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