tk 1838
Abstract: rotary potentiometer Thumb wheel 1E4 T125 rc series 1682.6101 Marquardt Marquardt 1298 rc 1e4 t125 MARQUARDT 4021.4620 dpst illuminated rocker switch diagram la 1837 nl T85 Slide Switch
Text: Switches and Sensors from Marquardt Marquardt Germany France Tunisia Marquardt GmbH Schloss-Str. 16 78604 Rietheim-Weilheim Phone +49 74 24 99-0 Fax +49 (74 24) 99-23 99 www.marquardt.de marquardt@marquardt.de Marquardt France S.A.R.L. 520, avenue Blaise Pascal - Lot n° 5
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Schmersal AZM 160
Abstract: Schmersal AZM 160 22 THERMAL Fuse m20 tf 115 c IEC 60947-5-1 limit switch EN 1088 schmersal interlock solenoid wiring diagram
Text: Safety in system: Protection for man and machine Main catalogue | Safety technology | Version 8.1 K.A. Schmersal GmbH & Co. KG Safety control systems Möddinghofe 30 D-42279 Wuppertal Phone: +49- 0 2 02-64 74-0 Fax: +49-(0) 2 02-64 74-100 E-Mail: info@schmersal.com
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D-42279
Schmersal AZM 160
Schmersal AZM 160 22
THERMAL Fuse m20 tf 115 c
IEC 60947-5-1 limit switch EN 1088
schmersal interlock solenoid wiring diagram
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14210
Abstract: No abstract text available
Text: STY80NM60N N-channel 600 V, 0.030 Ω, 74 A, MDmesh II Power MOSFET Max247 Features Type VDSS @ TJmax RDS on max ID STY80NM60N 650 V < 0.035 Ω 74 A • The worldwide best RDS(on) in Max247 ■ 100% avalanche tested ■ Low input capacitance and gate charge
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STY80NM60N
Max247
Max247
14210
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AN-363
Abstract: C1995 LS00 of ic 74 ls00 AN-363 national designing with ttl
Text: National Semiconductor Application Note 363 Walt Sirovy June 1984 54 74 series TTL has been used for more than a decade with excellent results and continues to be a standard choice for design engineers because of the wide performance range and system optimization possible from the different families available 54 74 logic comes in 8 different
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STY80NM60N
Abstract: 80nm60 JESD97
Text: STY80NM60N N-channel 600 V, 0.030 Ω, 74 A, MDmesh II Power MOSFET Max247 Features Type VDSS @ TJmax RDS on max ID STY80NM60N 650 V < 0.035 Ω 74 A • The worldwide best RDS(on) in Max247 ■ 100% avalanche tested ■ Low input capacitance and gate charge
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STY80NM60N
Max247
STY80NM60N
80nm60
JESD97
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JESD97
Abstract: STY80NM60N 80NM60N
Text: STY80NM60N N-channel 600 V, 0.030 Ω, 74 A, MDmesh II Power MOSFET Max247 Features Type VDSS @ TJmax RDS on max ID STY80NM60N 650 V < 0.035 Ω 74 A • The worldwide best RDS(on) in Max247 ■ 100% avalanche tested ■ Low input capacitance and gate charge
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STY80NM60N
Max247
JESD97
STY80NM60N
80NM60N
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STY80NM60N
Abstract: 80NM60N
Text: STY80NM60N N-channel 600 V, 0.030 Ω, 74 A, MDmesh II Power MOSFET Max247 Features Type VDSS @ TJmax RDS on max ID STY80NM60N 650 V < 0.035 Ω 74 A • The worldwide best RDS(on) in Max247 ■ 100% avalanche tested ■ Low input capacitance and gate charge
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STY80NM60N
Max247
STY80NM60N
80NM60N
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uart 8250
Abstract: 8250 uart 8250 uart datasheet programmable interval timer 8253 real time microprocessor 8253 applications 100 ohm POT .25W interfacing 8051 with eprom and ram zener diode 1N5232 8253 Programmable Interrupt Controller microprocessors interface 8253 "Real Time Clock"
Text: APPLICATION NOTE 74 Application Note 74 Reading and Writing iButtons via Serial Interfaces I. INTRODUCTION An iButtonTM is a chip housed in a stainless steel enclosure. The electrical interface is reduced to the absolute minimum, i.e., a single data line plus a ground reference. The energy needed for operation is either “stolen”
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1N5228
1N5234
1N5235
1N5242
2N7000
BSS110
uart 8250
8250 uart
8250 uart datasheet
programmable interval timer 8253
real time microprocessor 8253 applications
100 ohm POT .25W
interfacing 8051 with eprom and ram
zener diode 1N5232
8253 Programmable Interrupt Controller
microprocessors interface 8253 "Real Time Clock"
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uart 8250
Abstract: LZ64 8250 uart RS232-specification zener diode 1N4742 8250 uart rxd 8250 uart datasheet DS1982 DS1986 DS1991
Text: APPLICATION NOTE 74 Application Note 74 Reading and Writing iButtons via Serial Interfaces I. INTRODUCTION An iButtonTM is a chip housed in a stainless steel enclosure. The electrical interface is reduced to the absolute minimum, i.e., a single data line plus a ground reference. The energy needed for operation is either “stolen”
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1N5228
1N5234
1N5235
1N5242
2N7000
BSS110
uart 8250
LZ64
8250 uart
RS232-specification
zener diode 1N4742
8250 uart rxd
8250 uart datasheet
DS1982
DS1986
DS1991
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PO74G08A
Abstract: No abstract text available
Text: PO54G08A, PO74G08A www.potatosemi.com QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 1.125GHz with 2pf load
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PO54G08A,
PO74G08A
125GHz
750MHz
350MHz
5000-VHuman-BodyModel
A114-A)
200-VMachineModel
A115-A)
14pin
PO74G08A
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QL3004-1PF100C
Abstract: QL3004 QL3004-1PL68C QL4009-1PL84C pASIC3
Text: QL3004 - pASIC 3 FPGATM 4,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density last updated 5/17/2000 QL3004 - pASIC 3 FPGA DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 4,000 Usable PLD Gates with 74 I/Os
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QL3004
16-bit
QL3004-1PF100C
QL3004-1PL68C
QL4009-1PL84C
pASIC3
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SOT886
Abstract: BGA Package 0.35mm pitch SOT891 wcsp sot886-1 SOT-902 sot665
Text: NXP MicroPak and MicroPak II packages for single-, dual-, and triplegate logic functions World’s smallest leadless logic packages MicroPak and MicroPak II packages are the world’s smallest packages for single-, dual-, and triple-gate logic. They are 65% - 74% smaller than their PicoGate equivalents and offer a larger
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PO74G02A
Abstract: No abstract text available
Text: PO54G02A, PO74G02A www.potatosemi.com QUADRUPLE 2-INPUT POSITIVE-NOR GATES 54, 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 900MHz with 2pf load
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PO54G02A,
PO74G02A
900MHz
700MHz
400MHz
5000-VHuman-BodyModel
A114-A)
200-VMachineModel
A115-A)
14pin
PO74G02A
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SN74ALS123
Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS
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MIL-M-38510
SN74ALS123
SN7401
74LS424
54175
SN74298
SN74265
SN74LS630
SN74LS69
National Semiconductor Linear Data Book
Transistor AF 138
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uart 8250
Abstract: LZ64 uart 8051 115200 2n7000 complement 8250 UART master touch
Text: APPLICATION NOTE 74 Application Note 74 DALLAS SEMICONDUCTOR Reading and Writing Touch Memories via Serial Interfaces I. INTRODUCTION For read operations all devices are satisfied with a 5kQ pull-up resistor to supply energy and to terminate the 1-W ire bus. Touch Memory devices based on non-vol
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RS232
1N5242
ERA-82-004
1N5818
LT1109CN8--
2N7000
uart 8250
LZ64
uart 8051 115200
2n7000 complement
8250 UART
master touch
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STR G 6351
Abstract: str 6351 54ACT10 54ACTQ10 74ACT10 AC10 smd 3D5 3 PIN
Text: & March 1993 Semiconductor 54 AC/74 AC 10 • 74ACT10 Triple 3-Input NAND Gate General Description Features The ’A C /’AC T10 contains three, 3-input N AND gates. • Ic e reduced by 50% on 5 4 A C /74 A C only ■ O utputs s o u rc e /s in k 24 mA ■ Standard M ilitary Drawing SMD
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54AC/74AC10
74ACT10
ACT10
54AC/74AC
54ACT10
54ACTQ10
TL/F/9915-1
TL/F/9915
TL/F/9915-3
STR G 6351
str 6351
54ACTQ10
AC10
smd 3D5 3 PIN
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C574Q
Abstract: ED-37
Text: Military Standard FIFO s 64x4 64x5 C ascad ab le & Standalone Memory C57401 57401 C57401A 5 74 01 A C57402 5 7402 C 5 74 02 A 57402A Features/Benefits Description • • • • • The C/57401/1A and C57402/2A are “fall through” high-spead First-In First-Out FIFO memories organized 64 words by 4 bits
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C57401
C57401A
C57402
7402A
C/57401/1A
C57402/2A
192X12
C57401/A
C574Q
ED-37
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74ALS136
Abstract: 74as136
Text: SN 54A LS136, S N 54A S136, SN 74 A LS1 36, S N 74 A S136 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES WITH OPEN-COLLECTOR OUTPUTS D 2 8 3 7 , M A R C H 1 9 8 4 - R E V IS E D M A Y 1 9 8 6 P ackage O ption s Include P lastic "S m a ll O u tlin e " Packages, C eram ic Chip Carriers, and S tandard
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LS136,
74ALS136
74as136
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MA161
Abstract: No abstract text available
Text: DN74LS54 LS T T L DN74LS Series DN74LS54 74 LS ^ 4 - wide AND-OR-INVERT Gates • Description DN74LS54 contains four 2-input and four 3-input AND-ORINVERT gates. ^0^ ■ Features • • • • Low power consumption Pa = 4.5mW typical High speed ( tpa = 12ns)
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DN74LS
DN74LS54
DN74LS54
14-pin
S0-140)
MA161
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Untitled
Abstract: No abstract text available
Text: SN S4F10, S N 74 F 10 TRIPLE 3-INPUT POSITIVE-NANO GATES 02932, MARCH 1987-REVISED JANUARY 1989 • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN 54F10 . . . J PACKAGE SN74F10 . . . D OR N PACKAGE
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S4F10,
1987-REVISED
300-mil
54F10
SN74F10
SN74F10
SN54F10
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074d
Abstract: No abstract text available
Text: Semiconductor February 1993 54 A C /74 AC 11 Triple 3-Input AND Gate General Description Features The ’AC11 contains three 3-input AND gates. • ■ ■ ■ Logic Symbol Ice reduced by 50% Outputs source/sink 24 mA Standard Military Drawing SMD ’AC11: 5962-87611
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54AC/74AC11
TL/F/9916-2
TL/F/9916-1
D-B30M
115/P
074d
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CT08
Abstract: D3245 4HCT08
Text: SN54HCT08, SN74HCT08 QUADRUPLE 2 INPUT POSITIVE AND GATES D3245, NO VEM BER 1988 Inputs are TTL-Voltage Compatible SN 64 H C T 0 8 SN 74 H C T 0 8 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil
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SN54HCT08,
SN74HCT08
D3245,
300-mil
SN74HCT0B
CT08
D3245
4HCT08
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Untitled
Abstract: No abstract text available
Text: LS TTL DN74LS Series DN74 LS21 DN74LS21 t>10 74.^^1 Dual 4 -input P ositive AND Gates • Description DN74LS21 contains two 4-input positive isolation AND gate circuits. ■ • • • P-1 Features Low power consumption Pj = 8.5 mW typical High speed (tpd = 9ns typical)
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DN74LS
DN74LS21
DN74LS21
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TTL 7411
Abstract: TTL 7410 PIN CONFIGURATION 7410 PIN CONFIGURATION 7411 74LS10 pin configuration 7410 pin configuration 74LS10 function table 7411 ttl pin configuration of 7410 LS 7411
Text: Signetics I 74-10, 7411, LS10, LS11, S10, S11 Gates Logic Products Triple Three-Input NAND '10 , AND ('11) Gates Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6m A 74LS 10 10ns 1.2m A 74S 10 3ns 12m A 7411
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74LS10
74S10
74LS11
74S11
N7410N,
N74LS10N,
N74S10N
N7411N,
N74LS11N,
N74S11N
TTL 7411
TTL 7410
PIN CONFIGURATION 7410
PIN CONFIGURATION 7411
74LS10 pin configuration
7410 pin configuration
74LS10 function table
7411 ttl
pin configuration of 7410
LS 7411
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