us8k
Abstract: d1272
Text: 64T3256A AS7M64T3512A AS7M64T3256B AS7M64T3512B B Cache Modules Async Async Burst Burst Low Voltage 256/512 KByte Cache Modules with Tag PRELIMINARY ASYNCHRONOUS VERSIONS FEATURES 64-bit 3.3V asynchronous data PIN D I A G R A M a s y n c • 5V tolerant I/O specification
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64T3256A
AS7M64T3256A
AS7M64T3512A
AS7M64T3256B
AS7M64T3512B
64-bit
T00344c
us8k
d1272
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taa 480
Abstract: No abstract text available
Text: 64-bit Cache M odule A S 7 M 6 4 T 3 A Series Features Logic Block Diagram ♦ 8-bit 5V asynchronous tag , — * — » -► — ► ♦ High speed: tAA= 12-15 ns r LA 5 -19 I A4B A3B ECS OE — — — — ► A4 ► ► CE ► OE 1 “ I I A4A A3A E£S
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64-bit
AS7M64T3256A-12)
SRI655
32/64K
32/64K
taa 480
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ECS6
Abstract: TI06
Text: 6 4-bi t C a c h e M o d u l e A S 7 M 6 4 U 3 A Series Features Logic Block Diagram ♦ 64-bit 3.3V asynchronous data 1 A4A A3A CW E 0 E ♦ 8-bit 5V asynchronous tag — — — — * ► ► ► ♦ High speed: tAA = 12-15 ns A4B A3B CWE OE — — —
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64-bit
AS7M64U3256A-12)
256A-12)
CELP2x80
64U3B
7M64U3256A
7M64U3512A
32Kx8
32Kx8
ECS6
TI06
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Untitled
Abstract: No abstract text available
Text: H ig h p e r f o r m a n c e 2 5 6 / 5 12 K b y te 3.3V C ac h e m o d u le s •■ | A S 7 M 6 4 T 3 2 5 6 A A sync A S 7 M 6 4 T 3 5 1 2 A A sync R i.rct A S7M 64T3256B B u rst A S 7 M 6 4 T 3 5 1 2B B u rst Low voltage 2 5 6 /5 1 2 KByte cache modules w ith tag
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64-bit
AS7M64T32S6A
AS7M64T3512A
AS7M64T3256A
64T3512A
64T3256A-12)
60MHz*
64T3256A
3256B
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I007
Abstract: ST d63
Text: H ij>li | n- r I >i 11 il 11 ( i 2S6/S I l Kh\le i\ ( ' " lu " " , hl 1" I|l Im\ u iJiiijjL 2 S6 / S I l K 15y le c m lir i n n d u u il li luij Preliminary (asynchronous versions only) Logic block diagram Features • 6 4-b it 3.3V asy n chro no u s data
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64T3256A
64T35
82430FX
3256B
I007
ST d63
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